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Initial commit
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@@ -0,0 +1,554 @@
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#ifndef EMULATOR_INCLUDE_EMULATOR_GRAPHICS_SHADER_H_
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#define EMULATOR_INCLUDE_EMULATOR_GRAPHICS_SHADER_H_
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#include "Kyty/Core/Common.h"
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#include "Kyty/Core/String.h"
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#include "Kyty/Core/Vector.h"
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#include "Emulator/Common.h"
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#ifdef KYTY_EMU_ENABLED
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namespace Kyty::Libs::Graphics {
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struct VertexShaderInfo;
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struct PixelShaderInfo;
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struct ComputeShaderInfo;
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enum class ShaderType
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{
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Unknown,
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Vertex,
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Pixel,
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Fetch,
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Compute
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};
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enum class ShaderInstructionType
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{
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Unknown,
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DsAppend,
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DsConsume,
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Exp,
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BufferLoadDword,
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BufferLoadFormatX,
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BufferLoadFormatXy,
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BufferLoadFormatXyz,
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BufferLoadFormatXyzw,
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BufferStoreDword,
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BufferStoreFormatX,
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ImageSample,
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TBufferLoadFormatXyzw,
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SAndn2B64,
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SAndSaveexecB64,
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SEndpgm,
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SCbranchExecz,
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SLshlB32,
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SLoadDwordx4,
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SLoadDwordx8,
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SBufferLoadDword,
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SBufferLoadDwordx4,
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SBufferLoadDwordx8,
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SBufferLoadDwordx16,
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SMovB32,
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SMovB64,
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SSetpcB64,
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SSwappcB64,
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SWaitcnt,
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SWqmB64,
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VAddI32,
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VAndB32,
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VCmpEqF32,
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VCmpEqU32,
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VCmpLeF32,
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VCmpLeU32,
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VCmpNeU32,
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VCmpNeqF32,
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VCmpxEqU32,
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VCmpxGtU32,
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VCndmaskB32,
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VCvtF32U32,
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VCvtPkrtzF16F32,
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VCvtU32F32,
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VMacF32,
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VMadakF32,
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VMadF32,
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VMaxF32,
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VMbcntHiU32B32,
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VMbcntLoU32B32,
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VMinF32,
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VMovB32,
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VMulF32,
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VInterpP1F32,
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VInterpP2F32,
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VRcpF32,
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VRsqF32,
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VSadU32,
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VSqrtF32,
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VSubF32,
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VSubI32,
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VSubrevF32,
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VSubrevI32,
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};
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namespace ShaderInstructionFormat {
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enum FormatByte : uint64_t
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{
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U = 0,
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N,
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D, // operand_to_str(inst.dst)
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D2, // operand_to_str(inst.dst2)
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S0, // operand_to_str(inst.src[0])
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S1, // operand_to_str(inst.src[1])
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S2, // operand_to_str(inst.src[2])
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S3, // operand_to_str(inst.src[3])
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DA2, // operand_array_to_str(inst.dst, 2)
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DA3, // operand_array_to_str(inst.dst, 3)
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DA4, // operand_array_to_str(inst.dst, 4)
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DA8, // operand_array_to_str(inst.dst, 8)
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DA16, // operand_array_to_str(inst.dst, 16)
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D2A2, // operand_array_to_str(inst.dst2, 2)
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D2A3, // operand_array_to_str(inst.dst2, 3)
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D2A4, // operand_array_to_str(inst.dst2, 4)
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S0A2, // operand_array_to_str(inst.src[0], 2)
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S0A3, // operand_array_to_str(inst.src[0], 3)
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S0A4, // operand_array_to_str(inst.src[0], 4)
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S1A2, // operand_array_to_str(inst.src[1], 2)
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S1A3, // operand_array_to_str(inst.src[1], 3)
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S1A4, // operand_array_to_str(inst.src[1], 4)
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S1A8, // operand_array_to_str(inst.src[1], 8)
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S2A2, // operand_array_to_str(inst.src[2], 2)
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S2A3, // operand_array_to_str(inst.src[2], 3)
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S2A4, // operand_array_to_str(inst.src[2], 4)
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Attr, // attr%u.%u <- inst.src[1].constant.u, inst.src[2].constant.u
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Idxen, // idxen
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Float4, // format:float4
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Pos0, // pos0
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Done, // done
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Param0, // param0
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Param1, // param1
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Param2, // param2
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Param3, // param3
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Mrt0, // mrt_color0
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Compr, // compr
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Vm, // vm
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L, // label_%u
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DmaskF, // dmask:0xf
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Dmask7, // dmask:0x7
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Gds, // gds
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};
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constexpr uint64_t FormatDefine(std::initializer_list<uint64_t> f)
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{
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uint64_t r = 0;
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for (auto n: f)
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{
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r = (r << 8u) | n;
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}
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return r;
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}
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enum Format : uint64_t
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{
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Unknown = FormatDefine({U}),
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Empty = FormatDefine({N}),
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Imm = FormatDefine({S0}),
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Label = FormatDefine({L}),
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Mrt0Vsrc0Vsrc1ComprVmDone = FormatDefine({Mrt0, S0, S1, Compr, Vm, Done}),
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Mrt0Vsrc0Vsrc1Vsrc2Vsrc3VmDone = FormatDefine({Mrt0, S0, S1, S2, S3, Vm, Done}),
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Param0Vsrc0Vsrc1Vsrc2Vsrc3 = FormatDefine({Param0, S0, S1, S2, S3}),
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Param1Vsrc0Vsrc1Vsrc2Vsrc3 = FormatDefine({Param1, S0, S1, S2, S3}),
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Param2Vsrc0Vsrc1Vsrc2Vsrc3 = FormatDefine({Param2, S0, S1, S2, S3}),
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Param3Vsrc0Vsrc1Vsrc2Vsrc3 = FormatDefine({Param3, S0, S1, S2, S3}),
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Pos0Vsrc0Vsrc1Vsrc2Vsrc3Done = FormatDefine({Pos0, S0, S1, S2, S3, Done}),
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Saddr = FormatDefine({S0A2}),
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Sdst4SbaseSoffset = FormatDefine({DA4, S0A2, S1}),
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Sdst8SbaseSoffset = FormatDefine({DA8, S0A2, S1}),
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SdstSvSoffset = FormatDefine({D, S0A4, S1}),
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Sdst4SvSoffset = FormatDefine({DA4, S0A4, S1}),
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Sdst8SvSoffset = FormatDefine({DA8, S0A4, S1}),
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Sdst16SvSoffset = FormatDefine({DA16, S0A4, S1}),
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SVdstSVsrc0 = FormatDefine({D, S0}),
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SVdstSVsrc0SVsrc1 = FormatDefine({D, S0, S1}),
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Sdst2Ssrc02 = FormatDefine({DA2, S0A2}),
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Sdst2Ssrc02Ssrc12 = FormatDefine({DA2, S0A2, S1A2}),
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SmaskVsrc0Vsrc1 = FormatDefine({DA2, S0, S1}),
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Vdata1VaddrSvSoffsIdxen = FormatDefine({D, S0, S1A4, S2, Idxen}),
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Vdata2VaddrSvSoffsIdxen = FormatDefine({DA2, S0, S1A4, S2, Idxen}),
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Vdata3VaddrSvSoffsIdxen = FormatDefine({DA3, S0, S1A4, S2, Idxen}),
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Vdata4VaddrSvSoffsIdxen = FormatDefine({DA4, S0, S1A4, S2, Idxen}),
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Vdata4VaddrSvSoffsIdxenFloat4 = FormatDefine({DA4, S0, S1A4, S2, Idxen, Float4}),
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Vdata3Vaddr3StSsDmask7 = FormatDefine({DA3, S0A3, S1A8, S2A4, Dmask7}),
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Vdata4Vaddr3StSsDmaskF = FormatDefine({DA4, S0A3, S1A8, S2A4, DmaskF}),
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VdstVsrc0Vsrc1Smask2 = FormatDefine({D, S0, S1, S2A2}),
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VdstVsrc0Vsrc1Vsrc2 = FormatDefine({D, S0, S1, S2}),
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VdstVsrcAttrChan = FormatDefine({D, S0, Attr}),
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VdstSdst2Vsrc0Vsrc1 = FormatDefine({D, D2A2, S0, S1}),
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VdstGds = FormatDefine({D, Gds})
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};
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} // namespace ShaderInstructionFormat
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enum class ShaderOperandType
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{
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Unknown,
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LiteralConstant,
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IntegerInlineConstant,
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FloatInlineConstant,
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VccLo,
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VccHi,
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ExecLo,
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ExecHi,
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ExecZ,
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Vgpr,
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Sgpr,
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M0
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};
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union ShaderConstant
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{
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int32_t i;
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uint32_t u;
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float f;
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};
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struct ShaderOperand
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{
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ShaderOperandType type = ShaderOperandType::Unknown;
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ShaderConstant constant = {0};
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int register_id = 0;
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int size = 0;
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float multiplier = 1.0f;
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bool negate = false;
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bool clamp = false;
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bool operator==(const ShaderOperand& other) const
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{
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return type == other.type && constant.u == other.constant.u && register_id == other.register_id && size == other.size;
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}
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};
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struct ShaderInstruction
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{
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uint32_t pc = 0;
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ShaderInstructionType type = ShaderInstructionType::Unknown;
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ShaderInstructionFormat::Format format = ShaderInstructionFormat::Unknown;
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ShaderOperand src[4];
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int src_num = 0;
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ShaderOperand dst;
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ShaderOperand dst2;
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};
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class ShaderCode
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{
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public:
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ShaderCode() { m_instructions.Expand(128); };
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virtual ~ShaderCode() = default;
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KYTY_CLASS_DEFAULT_COPY(ShaderCode);
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[[nodiscard]] const Vector<ShaderInstruction>& GetInstructions() const { return m_instructions; }
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Vector<ShaderInstruction>& GetInstructions() { return m_instructions; }
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[[nodiscard]] const Vector<uint32_t>& GetLabels() const { return m_labels; }
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Vector<uint32_t>& GetLabels() { return m_labels; }
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[[nodiscard]] String DbgDump() const;
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static String DbgInstructionToStr(const ShaderInstruction& inst);
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[[nodiscard]] ShaderType GetType() const { return m_type; }
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void SetType(ShaderType type) { this->m_type = type; }
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private:
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Vector<ShaderInstruction> m_instructions;
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Vector<uint32_t> m_labels;
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ShaderType m_type = ShaderType::Unknown;
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};
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struct ShaderId
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{
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Vector<uint32_t> ids;
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bool operator==(const ShaderId& other) const { return ids == other.ids; }
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bool operator!=(const ShaderId& other) const { return !(*this == other); }
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};
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struct ShaderBufferResource
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{
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uint32_t fields[4] = {0};
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void UpdateAddress(uint64_t gpu_addr)
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{
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auto lo = static_cast<uint32_t>(gpu_addr & 0xffffffffu);
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auto hi = static_cast<uint32_t>(gpu_addr >> 32u);
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fields[0] = lo;
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fields[1] = (fields[1] & 0xfffff000u) | (hi & 0xfffu);
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}
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[[nodiscard]] uint64_t Base() const { return (fields[0] | (static_cast<uint64_t>(fields[1]) << 32u)) & 0xFFFFFFFFFFFu; }
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[[nodiscard]] uint16_t Stride() const { return (fields[1] >> 16u) & 0x3FFFu; }
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[[nodiscard]] bool SwizzleEnabled() const { return ((fields[1] >> 31u) & 0x1u) == 1; }
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[[nodiscard]] uint32_t NumRecords() const { return fields[2]; }
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[[nodiscard]] uint8_t DstSelX() const { return (fields[3] >> 0u) & 0x7u; }
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[[nodiscard]] uint8_t DstSelY() const { return (fields[3] >> 3u) & 0x7u; }
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[[nodiscard]] uint8_t DstSelZ() const { return (fields[3] >> 6u) & 0x7u; }
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[[nodiscard]] uint8_t DstSelW() const { return (fields[3] >> 9u) & 0x7u; }
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[[nodiscard]] uint8_t Nfmt() const { return (fields[3] >> 12u) & 0x7u; }
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[[nodiscard]] uint8_t Dfmt() const { return (fields[3] >> 15u) & 0xFu; }
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[[nodiscard]] bool AddTid() const { return ((fields[3] >> 23u) & 0x1u) == 1; }
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[[nodiscard]] uint8_t MemoryType() const
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{
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return ((fields[1] >> 7u) & 0x60u) | ((fields[3] >> 25u) & 0x1cu) | ((fields[1] >> 14u) & 0x3u);
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}
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};
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struct ShaderTextureResource
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{
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uint32_t fields[8] = {0};
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void UpdateAddress(uint64_t gpu_addr)
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{
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auto lo = static_cast<uint32_t>(gpu_addr & 0xffffffffu);
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auto hi = static_cast<uint32_t>(gpu_addr >> 32u);
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fields[0] = lo;
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fields[1] = (fields[1] & 0xffffffc0u) | (hi & 0x3fu);
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}
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[[nodiscard]] uint64_t Base() const { return ((fields[0] | (static_cast<uint64_t>(fields[1]) << 32u)) & 0x3FFFFFFFFFu) << 8u; }
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[[nodiscard]] uint16_t MinLod() const { return (fields[1] >> 8u) & 0xFFFu; }
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[[nodiscard]] uint8_t Dfmt() const { return (fields[1] >> 20u) & 0x3Fu; }
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[[nodiscard]] uint8_t Nfmt() const { return (fields[1] >> 26u) & 0xFu; }
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[[nodiscard]] uint16_t Width() const { return (fields[2] >> 0u) & 0x3FFFu; }
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[[nodiscard]] uint16_t Height() const { return (fields[2] >> 14u) & 0x3FFFu; }
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[[nodiscard]] uint8_t PerfMod() const { return (fields[2] >> 28u) & 0x7u; }
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[[nodiscard]] bool Interlaced() const { return ((fields[2] >> 31u) & 0x1u) == 1; }
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[[nodiscard]] uint8_t DstSelX() const { return (fields[3] >> 0u) & 0x7u; }
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[[nodiscard]] uint8_t DstSelY() const { return (fields[3] >> 3u) & 0x7u; }
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[[nodiscard]] uint8_t DstSelZ() const { return (fields[3] >> 6u) & 0x7u; }
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[[nodiscard]] uint8_t DstSelW() const { return (fields[3] >> 9u) & 0x7u; }
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[[nodiscard]] uint8_t BaseLevel() const { return (fields[3] >> 12u) & 0xFu; }
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[[nodiscard]] uint8_t LastLevel() const { return (fields[3] >> 16u) & 0xFu; }
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[[nodiscard]] uint8_t TilingIdx() const { return (fields[3] >> 20u) & 0x1Fu; }
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[[nodiscard]] bool Pow2Pad() const { return ((fields[3] >> 25u) & 0x1u) == 1; }
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[[nodiscard]] uint8_t Type() const { return (fields[3] >> 28u) & 0xFu; }
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[[nodiscard]] uint16_t Depth() const { return (fields[4] >> 0u) & 0x1FFFu; }
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[[nodiscard]] uint16_t Pitch() const { return (fields[4] >> 13u) & 0x3FFFu; }
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[[nodiscard]] uint16_t BaseArray() const { return (fields[5] >> 0u) & 0x1FFFu; }
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[[nodiscard]] uint16_t LastArray() const { return (fields[5] >> 13u) & 0x1FFFu; }
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[[nodiscard]] uint16_t MinLodWarn() const { return (fields[6] >> 0u) & 0xFFFu; }
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[[nodiscard]] uint8_t CounterBankId() const { return (fields[6] >> 12u) & 0xFFu; }
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[[nodiscard]] bool LodHdwCntEn() const { return ((fields[6] >> 20u) & 0x1u) == 1; }
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[[nodiscard]] uint8_t MemoryType() const
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{
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return ((fields[1] >> 6u) & 0x3u) | ((fields[1] >> 30u) << 2u) | ((fields[3] & 0x04000000u) == 0 ? 0x60u : 0x10u);
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}
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||||
};
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struct ShaderSamplerResource
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{
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uint32_t fields[4] = {0};
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void UpdateIndex(uint32_t index) { fields[0] = index; }
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[[nodiscard]] uint8_t ClampX() const { return (fields[0] >> 0u) & 0x7u; }
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[[nodiscard]] uint8_t ClampY() const { return (fields[0] >> 3u) & 0x7u; }
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[[nodiscard]] uint8_t ClampZ() const { return (fields[0] >> 6u) & 0x7u; }
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[[nodiscard]] uint8_t MaxAnisoRatio() const { return (fields[0] >> 9u) & 0x7u; }
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[[nodiscard]] uint8_t DepthCompareFunc() const { return (fields[0] >> 12u) & 0x7u; }
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[[nodiscard]] bool ForceUnormCoords() const { return ((fields[0] >> 15u) & 0x1u) == 1; }
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[[nodiscard]] uint8_t AnisoThreshold() const { return (fields[0] >> 16u) & 0x7u; }
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[[nodiscard]] bool McCoordTrunc() const { return ((fields[0] >> 19u) & 0x1u) == 1; }
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[[nodiscard]] bool ForceDegamma() const { return ((fields[0] >> 20u) & 0x1u) == 1; }
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[[nodiscard]] uint8_t AnisoBias() const { return (fields[0] >> 21u) & 0x3Fu; }
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[[nodiscard]] bool TruncCoord() const { return ((fields[0] >> 27u) & 0x1u) == 1; }
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[[nodiscard]] bool DisableCubeWrap() const { return ((fields[0] >> 28u) & 0x1u) == 1; }
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[[nodiscard]] uint8_t FilterMode() const { return (fields[0] >> 29u) & 0x3u; }
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||||
[[nodiscard]] uint16_t MinLod() const { return (fields[1] >> 0u) & 0xFFFu; }
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[[nodiscard]] uint16_t MaxLod() const { return (fields[1] >> 12u) & 0xFFFu; }
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[[nodiscard]] uint8_t PerfMip() const { return (fields[1] >> 24u) & 0xFu; }
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||||
[[nodiscard]] uint8_t PerfZ() const { return (fields[1] >> 28u) & 0xFu; }
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||||
[[nodiscard]] uint16_t LodBias() const { return (fields[2] >> 0u) & 0x3FFFu; }
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||||
[[nodiscard]] uint8_t LodBiasSec() const { return (fields[2] >> 14u) & 0x3Fu; }
|
||||
[[nodiscard]] uint8_t XyMagFilter() const { return (fields[2] >> 20u) & 0x3u; }
|
||||
[[nodiscard]] uint8_t XyMinFilter() const { return (fields[2] >> 22u) & 0x3u; }
|
||||
[[nodiscard]] uint8_t ZFilter() const { return (fields[2] >> 24u) & 0x3u; }
|
||||
[[nodiscard]] uint8_t MipFilter() const { return (fields[2] >> 26u) & 0x3u; }
|
||||
[[nodiscard]] uint16_t BorderColorPtr() const { return (fields[3] >> 0u) & 0xFFFu; }
|
||||
[[nodiscard]] uint8_t BorderColorType() const { return (fields[3] >> 30u) & 0x3u; }
|
||||
};
|
||||
|
||||
struct ShaderGdsResource
|
||||
{
|
||||
uint32_t field = 0;
|
||||
|
||||
[[nodiscard]] uint16_t Base() const { return (field >> 16u) & 0xFFFFu; }
|
||||
[[nodiscard]] uint16_t Size() const { return field & 0xFFFFu; }
|
||||
};
|
||||
|
||||
struct ShaderExtendedResource
|
||||
{
|
||||
uint32_t fields[2] = {0};
|
||||
|
||||
void UpdateAddress(uint64_t gpu_addr)
|
||||
{
|
||||
auto lo = static_cast<uint32_t>(gpu_addr & 0xffffffffu);
|
||||
auto hi = static_cast<uint32_t>(gpu_addr >> 32u);
|
||||
fields[0] = lo;
|
||||
fields[1] = hi;
|
||||
}
|
||||
|
||||
[[nodiscard]] uint64_t Base() const { return (fields[0] | (static_cast<uint64_t>(fields[1]) << 32u)); }
|
||||
};
|
||||
|
||||
struct ShaderVertexInputBuffer
|
||||
{
|
||||
static constexpr int ATTR_MAX = 16;
|
||||
|
||||
uint64_t addr = 0;
|
||||
uint32_t stride = 0;
|
||||
uint32_t num_records = 0;
|
||||
int attr_num = 0;
|
||||
int attr_indices[ATTR_MAX] = {0};
|
||||
uint32_t attr_offsets[ATTR_MAX] = {0};
|
||||
};
|
||||
|
||||
struct ShaderVertexDestination
|
||||
{
|
||||
int register_start = 0;
|
||||
int registers_num = 0;
|
||||
};
|
||||
|
||||
enum class ShaderStorageUsage
|
||||
{
|
||||
Unknown,
|
||||
Constant,
|
||||
ReadOnly,
|
||||
ReadWrite,
|
||||
};
|
||||
|
||||
struct ShaderStorageResources
|
||||
{
|
||||
static constexpr int BUFFERS_MAX = 16;
|
||||
|
||||
ShaderBufferResource buffers[BUFFERS_MAX];
|
||||
ShaderStorageUsage usages[BUFFERS_MAX] = {};
|
||||
int slots[BUFFERS_MAX] = {0};
|
||||
int start_register[BUFFERS_MAX] = {0};
|
||||
bool extended[BUFFERS_MAX] = {};
|
||||
// int extended_index[BUFFERS_MAX] = {0};
|
||||
int buffers_num = 0;
|
||||
int binding_index = 0;
|
||||
};
|
||||
|
||||
struct ShaderTextureResources
|
||||
{
|
||||
static constexpr int RES_MAX = 16;
|
||||
|
||||
ShaderTextureResource textures[RES_MAX];
|
||||
int start_register[RES_MAX] = {0};
|
||||
bool extended[RES_MAX] = {};
|
||||
// int extended_index[RES_MAX] = {0};
|
||||
int textures_num = 0;
|
||||
int binding_index = 0;
|
||||
};
|
||||
|
||||
struct ShaderSamplerResources
|
||||
{
|
||||
static constexpr int RES_MAX = 16;
|
||||
|
||||
ShaderSamplerResource samplers[RES_MAX];
|
||||
int start_register[RES_MAX] = {0};
|
||||
bool extended[RES_MAX] = {};
|
||||
// int extended_index[RES_MAX] = {0};
|
||||
int samplers_num = 0;
|
||||
int binding_index = 0;
|
||||
};
|
||||
|
||||
struct ShaderGdsResources
|
||||
{
|
||||
static constexpr int POINTERS_MAX = 1;
|
||||
|
||||
ShaderGdsResource pointers[POINTERS_MAX];
|
||||
int slots[POINTERS_MAX] = {0};
|
||||
int start_register[POINTERS_MAX] = {0};
|
||||
bool extended[POINTERS_MAX] = {};
|
||||
// int extended_index[POINTERS_MAX] = {0};
|
||||
int pointers_num = 0;
|
||||
int binding_index = 0;
|
||||
};
|
||||
|
||||
struct ShaderExtendedResources
|
||||
{
|
||||
bool used = false;
|
||||
int slot = 0;
|
||||
// int dw_num = 0;
|
||||
int start_register = 0;
|
||||
ShaderExtendedResource data;
|
||||
};
|
||||
|
||||
struct ShaderResources
|
||||
{
|
||||
uint32_t push_constant_offset = 0;
|
||||
uint32_t push_constant_size = 0;
|
||||
uint32_t descriptor_set_slot = 0;
|
||||
ShaderStorageResources storage_buffers;
|
||||
ShaderTextureResources textures2D;
|
||||
ShaderSamplerResources samplers;
|
||||
ShaderGdsResources gds_pointers;
|
||||
ShaderExtendedResources extended;
|
||||
};
|
||||
|
||||
struct ShaderVertexInputInfo
|
||||
{
|
||||
static constexpr int RES_MAX = 16;
|
||||
|
||||
ShaderBufferResource resources[RES_MAX];
|
||||
ShaderVertexDestination resources_dst[RES_MAX];
|
||||
int resources_num = 0;
|
||||
bool fetch = false;
|
||||
ShaderVertexInputBuffer buffers[RES_MAX];
|
||||
int buffers_num = 0;
|
||||
int export_count = 0;
|
||||
ShaderResources bind;
|
||||
};
|
||||
|
||||
struct ShaderComputeInputInfo
|
||||
{
|
||||
uint32_t threads_num[3] = {};
|
||||
int workgroup_register = 0;
|
||||
ShaderResources bind;
|
||||
};
|
||||
|
||||
struct ShaderPixelInputInfo
|
||||
{
|
||||
uint32_t interpolator_settings[32] = {0};
|
||||
uint32_t input_num = 0;
|
||||
uint8_t target_output_mode[8] = {};
|
||||
bool ps_pos_xy = false;
|
||||
bool ps_pixel_kill_enable = false;
|
||||
ShaderResources bind;
|
||||
};
|
||||
|
||||
void ShaderGetInputInfoVS(const VertexShaderInfo* regs, ShaderVertexInputInfo* info);
|
||||
void ShaderGetInputInfoPS(const PixelShaderInfo* regs, const ShaderVertexInputInfo* vs_info, ShaderPixelInputInfo* ps_info);
|
||||
void ShaderGetInputInfoCS(const ComputeShaderInfo* regs, ShaderComputeInputInfo* info);
|
||||
void ShaderDbgDumpInputInfo(const ShaderVertexInputInfo* info);
|
||||
void ShaderDbgDumpInputInfo(const ShaderPixelInputInfo* info);
|
||||
void ShaderDbgDumpInputInfo(const ShaderComputeInputInfo* info);
|
||||
ShaderId ShaderGetIdVS(const VertexShaderInfo* regs, const ShaderVertexInputInfo* input_info);
|
||||
ShaderId ShaderGetIdPS(const PixelShaderInfo* regs, const ShaderPixelInputInfo* input_info);
|
||||
ShaderId ShaderGetIdCS(const ComputeShaderInfo* regs, const ShaderComputeInputInfo* input_info);
|
||||
Vector<uint32_t> ShaderRecompileVS(const VertexShaderInfo* regs, const ShaderVertexInputInfo* input_info);
|
||||
Vector<uint32_t> ShaderRecompilePS(const PixelShaderInfo* regs, const ShaderPixelInputInfo* input_info);
|
||||
Vector<uint32_t> ShaderRecompileCS(const ComputeShaderInfo* regs, const ShaderComputeInputInfo* input_info);
|
||||
bool ShaderIsDisabled(uint64_t addr);
|
||||
void ShaderDisable(uint64_t id);
|
||||
|
||||
} // namespace Kyty::Libs::Graphics
|
||||
|
||||
#endif // KYTY_EMU_ENABLED
|
||||
|
||||
#endif /* EMULATOR_INCLUDE_EMULATOR_GRAPHICS_SHADER_H_ */
|
||||
Reference in New Issue
Block a user