mirror of
https://github.com/InoriRus/Kyty.git
synced 2026-08-28 05:06:40 +00:00
PS5 graphics (#42)
This commit is contained in:
InoriRus
@@ -29,20 +29,26 @@ struct ColorView
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{
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uint32_t base_array_slice_index = 0;
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uint32_t last_array_slice_index = 0;
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uint32_t current_mip_level = 0;
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};
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struct ColorInfo
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{
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bool fmask_compression_enable = false;
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uint32_t fmask_compression_mode = 0;
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bool cmask_fast_clear_enable = false;
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bool dcc_compression_enable = false;
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bool neo_mode = false;
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uint32_t cmask_tile_mode = 0;
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uint32_t cmask_tile_mode_neo = 0;
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uint32_t format = 0;
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uint32_t channel_type = 0;
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uint32_t channel_order = 0;
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bool fmask_compression_enable = false;
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// uint32_t fmask_compression_mode = 0;
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bool fmask_data_compression_disable = false;
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bool fmask_one_frag_mode = false;
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bool cmask_fast_clear_enable = false;
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bool dcc_compression_enable = false;
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bool neo_mode = false;
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bool blend_clamp = false;
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bool blend_bypass = false;
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bool round_mode = false;
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uint32_t cmask_tile_mode = 0;
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uint32_t cmask_tile_mode_neo = 0;
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uint32_t format = 0;
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uint32_t channel_type = 0;
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uint32_t channel_order = 0;
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};
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struct ColorAttrib
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@@ -54,14 +60,33 @@ struct ColorAttrib
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uint32_t num_fragments = 0;
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};
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struct ColorDcc
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struct ColorAttrib2
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{
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uint32_t max_uncompressed_block_size = 0;
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uint32_t max_compressed_block_size = 0;
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uint32_t min_compressed_block_size = 0;
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uint32_t color_transform = 0;
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bool enable_overwrite_combiner = false;
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bool force_independent_blocks = false;
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uint32_t height = 0;
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uint32_t width = 0;
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uint32_t num_mip_levels = 0;
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};
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struct ColorAttrib3
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{
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uint32_t depth = 0;
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uint32_t tile_mode = 0;
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uint32_t dimension = 0;
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bool cmask_pipe_aligned = false;
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bool dcc_pipe_aligned = false;
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};
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struct ColorDccControl
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{
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uint32_t max_uncompressed_block_size = 0;
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uint32_t max_compressed_block_size = 0;
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uint32_t min_compressed_block_size = 0;
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uint32_t color_transform = 0;
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bool dcc_clear_key_enable = false;
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bool overwrite_combiner_disable = false;
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bool independent_64b_blocks = false;
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bool independent_128b_blocks = false;
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bool data_write_on_dcc_clear_to_reg = false;
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};
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struct ColorCmask
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@@ -113,7 +138,9 @@ struct RenderTarget
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ColorView view;
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ColorInfo info;
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ColorAttrib attrib;
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ColorDcc dcc;
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ColorAttrib2 attrib2;
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ColorAttrib3 attrib3;
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ColorDccControl dcc;
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ColorCmask cmask;
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ColorCmaskSlice cmask_slice;
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ColorFmask fmask;
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@@ -124,23 +151,29 @@ struct RenderTarget
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ColorSize size;
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};
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struct DepthRenderTargetZInfo
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struct DepthZInfo
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{
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uint32_t format = 0;
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uint32_t tile_mode_index = 0;
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uint32_t num_samples = 0;
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bool tile_surface_enable = false;
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bool expclear_enabled = false;
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uint32_t zrange_precision = 0;
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uint32_t format = 0;
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uint32_t tile_mode_index = 0;
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uint32_t num_samples = 0;
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uint32_t zrange_precision = 0;
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bool tile_surface_enable = false;
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bool expclear_enabled = false;
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bool embedded_sample_locations = false;
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bool partially_resident = false;
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uint8_t num_mip_levels = 0;
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uint8_t plane_compression = 0;
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};
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struct DepthRenderTargetStencilInfo
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struct DepthStencilInfo
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{
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uint32_t format = 0;
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uint32_t tile_mode_index = 0;
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uint32_t tile_split = 0;
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bool expclear_enabled = false;
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bool tile_stencil_disable = false;
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uint32_t format = 0;
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uint32_t tile_mode_index = 0;
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uint32_t tile_split = 0;
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bool expclear_enabled = false;
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bool tile_stencil_disable = false;
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bool texture_compatible_stencil = false;
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bool partially_resident = false;
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};
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struct DepthRenderTargetDepthInfo
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@@ -154,10 +187,19 @@ struct DepthRenderTargetDepthInfo
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uint32_t num_banks = 0;
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};
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struct DepthRenderTargetDepthView
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struct DepthDepthView
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{
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uint32_t slice_start = 0;
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uint32_t slice_max = 0;
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uint32_t slice_start = 0;
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uint32_t slice_max = 0;
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uint8_t current_mip_level = 0;
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bool depth_write_disable = false;
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bool stencil_write_disable = false;
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};
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struct DepthDepthSizeXY
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{
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uint16_t x_max = 0;
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uint16_t y_max = 0;
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};
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struct DepthRenderTargetHTileSurface
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@@ -173,10 +215,11 @@ struct DepthRenderTargetHTileSurface
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struct DepthRenderTarget
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{
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DepthRenderTargetZInfo z_info;
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DepthRenderTargetStencilInfo stencil_info;
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DepthZInfo z_info;
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DepthStencilInfo stencil_info;
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DepthDepthView depth_view;
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DepthDepthSizeXY size;
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DepthRenderTargetDepthInfo depth_info;
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DepthRenderTargetDepthView depth_view;
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DepthRenderTargetHTileSurface htile_surface;
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uint64_t z_read_base_addr = 0;
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@@ -220,14 +263,16 @@ struct ClipControl
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struct DepthControl
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{
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bool stencil_enable = false;
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bool z_enable = false;
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bool z_write_enable = false;
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bool depth_bounds_enable = false;
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uint8_t zfunc = 0;
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bool backface_enable = false;
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uint8_t stencilfunc = 0;
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uint8_t stencilfunc_bf = 0;
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bool stencil_enable = false;
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bool z_enable = false;
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bool z_write_enable = false;
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bool depth_bounds_enable = false;
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uint8_t zfunc = 0;
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bool backface_enable = false;
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uint8_t stencilfunc = 0;
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uint8_t stencilfunc_bf = 0;
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bool color_writes_on_depth_fail_enable = false;
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bool color_writes_on_depth_pass_disable = false;
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};
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struct StencilControl
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@@ -374,29 +419,66 @@ struct ScreenViewport
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float guard_band_vert_discard = 0.0f;
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};
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struct VsShaderResource1
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{
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uint8_t vgprs = 0;
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uint8_t sgprs = 0;
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uint8_t priority = 0;
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uint8_t float_mode = 0;
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bool dx10_clamp = false;
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bool ieee_mode = false;
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uint8_t vgpr_component_count = 0;
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bool cu_group_enable = false;
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bool require_forward_progress = false;
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bool fp16_overflow = false;
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};
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struct VsShaderResource2
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{
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bool scratch_en = false;
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uint8_t user_sgpr = 0;
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bool offchip_lds = false;
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bool streamout_enabled = false;
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uint8_t shared_vgprs = 0;
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};
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struct VsStageRegisters
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{
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uint32_t m_spiShaderPgmLoVs = 0;
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uint32_t m_spiShaderPgmHiVs = 0;
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uint32_t m_spiShaderPgmRsrc1Vs = 0;
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uint32_t m_spiShaderPgmRsrc2Vs = 0;
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uint64_t data_addr = 0;
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VsShaderResource1 rsrc1;
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VsShaderResource2 rsrc2;
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};
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[[nodiscard]] uint64_t GetGpuAddress() const;
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[[nodiscard]] bool GetStreamoutEnabled() const;
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[[nodiscard]] uint32_t GetSgprCount() const;
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[[nodiscard]] uint32_t GetInputComponentsCount() const;
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[[nodiscard]] uint32_t GetUnknown1() const;
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[[nodiscard]] uint32_t GetUnknown2() const;
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struct PsShaderResource1
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{
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uint8_t vgprs = 0;
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uint8_t sgprs = 0;
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uint8_t priority = 0;
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uint8_t float_mode = 0;
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bool dx10_clamp = false;
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bool debug_mode = false;
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bool ieee_mode = false;
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bool cu_group_disable = false;
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bool require_forward_progress = false;
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bool fp16_overflow = false;
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};
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struct PsShaderResource2
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{
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bool scratch_en = false;
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uint8_t user_sgpr = 0;
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bool wave_cnt_en = false;
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uint8_t extra_lds_size = 0;
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bool raster_ordered_shading = false;
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uint8_t shared_vgprs = 0;
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};
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struct PsStageRegisters
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{
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uint64_t data_addr = 0;
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uint8_t vgprs = 0;
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uint8_t sgprs = 0;
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uint8_t scratch_en = 0;
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uint8_t user_sgpr = 0;
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uint8_t wave_cnt_en = 0;
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uint64_t data_addr = 0;
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PsShaderResource1 rsrc1;
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PsShaderResource2 rsrc2;
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uint64_t chksum = 0;
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};
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struct CsStageRegisters
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@@ -419,6 +501,45 @@ struct CsStageRegisters
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uint8_t lds_size = 0;
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};
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struct EsStageRegisters
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{
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uint64_t data_addr = 0;
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};
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struct GsShaderResource1
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{
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uint8_t vgprs = 0;
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uint8_t sgprs = 0;
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uint8_t priority = 0;
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uint8_t float_mode = 0;
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bool dx10_clamp = false;
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bool debug_mode = false;
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bool ieee_mode = false;
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bool cu_group_enable = false;
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bool require_forward_progress = false;
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bool lds_configuration = false;
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uint8_t gs_vgpr_component_count = 0;
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bool fp16_overflow = false;
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};
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struct GsShaderResource2
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{
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bool scratch_en = false;
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uint8_t user_sgpr = 0;
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uint8_t es_vgpr_component_count = 0;
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bool offchip_lds = false;
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uint8_t lds_size = 0;
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uint8_t shared_vgprs = 0;
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};
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struct GsStageRegisters
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{
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uint64_t data_addr = 0;
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GsShaderResource1 rsrc1;
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GsShaderResource2 rsrc2;
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uint64_t chksum = 0;
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};
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struct ShaderRegisters
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{
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uint32_t m_spiVsOutConfig = 0;
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@@ -472,9 +593,12 @@ struct UserSgprInfo
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struct VertexShaderInfo
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{
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VsStageRegisters vs_regs;
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EsStageRegisters es_regs;
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GsStageRegisters gs_regs;
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uint32_t vs_shader_modifier = 0;
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uint32_t vs_embedded_id = 0;
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UserSgprInfo vs_user_sgpr;
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UserSgprInfo gs_user_sgpr;
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bool vs_embedded = false;
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};
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@@ -493,6 +617,19 @@ struct ComputeShaderInfo
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UserSgprInfo cs_user_sgpr;
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};
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struct GeControl
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{
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uint16_t primitive_group_size = 0;
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uint16_t vertex_group_size = 0;
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};
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struct GeUserVgprEn
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{
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bool vgpr1 = false;
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bool vgpr2 = false;
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bool vgpr3 = false;
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};
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class Context
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{
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public:
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@@ -509,7 +646,9 @@ public:
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void SetColorView(uint32_t slot, const ColorView& view) { m_render_targets[slot].view = view; }
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void SetColorInfo(uint32_t slot, const ColorInfo& info) { m_render_targets[slot].info = info; }
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void SetColorAttrib(uint32_t slot, const ColorAttrib& attrib) { m_render_targets[slot].attrib = attrib; }
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void SetColorDcc(uint32_t slot, const ColorDcc& dcc) { m_render_targets[slot].dcc = dcc; }
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void SetColorAttrib2(uint32_t slot, const ColorAttrib2& attrib2) { m_render_targets[slot].attrib2 = attrib2; }
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void SetColorAttrib3(uint32_t slot, const ColorAttrib3& attrib3) { m_render_targets[slot].attrib3 = attrib3; }
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void SetColorDccControl(uint32_t slot, const ColorDccControl& dcc) { m_render_targets[slot].dcc = dcc; }
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void SetColorCmask(uint32_t slot, const ColorCmask& cmask) { m_render_targets[slot].cmask = cmask; }
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void SetColorCmaskSlice(uint32_t slot, const ColorCmaskSlice& cmask_slice) { m_render_targets[slot].cmask_slice = cmask_slice; }
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void SetColorFmask(uint32_t slot, const ColorFmask& fmask) { m_render_targets[slot].fmask = fmask; }
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@@ -531,16 +670,27 @@ public:
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void SetDepthRenderTarget(const DepthRenderTarget& target) { m_depth_render_target = target; }
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[[nodiscard]] const DepthRenderTarget& GetDepthRenderTarget() const { return m_depth_render_target; }
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void SetDepthRenderTargetZInfo(const DepthRenderTargetZInfo& info) { m_depth_render_target.z_info = info; }
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[[nodiscard]] const DepthRenderTargetZInfo& GetDepthRenderTargetZInfo() const { return m_depth_render_target.z_info; }
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void SetDepthRenderTargetStencilInfo(const DepthRenderTargetStencilInfo& info) { m_depth_render_target.stencil_info = info; }
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[[nodiscard]] const DepthRenderTargetStencilInfo& GetDepthRenderTargetStencilInfo() const { return m_depth_render_target.stencil_info; }
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void SetDepthZInfo(const DepthZInfo& info) { m_depth_render_target.z_info = info; }
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[[nodiscard]] const DepthZInfo& GetDepthZInfo() const { return m_depth_render_target.z_info; }
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void SetDepthStencilInfo(const DepthStencilInfo& info) { m_depth_render_target.stencil_info = info; }
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[[nodiscard]] const DepthStencilInfo& GetDepthStencilInfo() const { return m_depth_render_target.stencil_info; }
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void SetDepthZReadBase(uint64_t addr) { m_depth_render_target.z_read_base_addr = addr; }
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void SetDepthStencilReadBase(uint64_t addr) { m_depth_render_target.stencil_read_base_addr = addr; }
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void SetDepthZWriteBase(uint64_t addr) { m_depth_render_target.z_write_base_addr = addr; }
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void SetDepthStencilWriteBase(uint64_t addr) { m_depth_render_target.stencil_write_base_addr = addr; }
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void SetDepthHTileDataBase(uint64_t addr) { m_depth_render_target.htile_data_base_addr = addr; }
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void SetDepthDepthView(const DepthDepthView& view) { m_depth_render_target.depth_view = view; }
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[[nodiscard]] const DepthDepthView& GetDepthDepthView() const { return m_depth_render_target.depth_view; }
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void SetDepthDepthSizeXY(const DepthDepthSizeXY& size) { m_depth_render_target.size = size; }
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[[nodiscard]] const DepthDepthSizeXY& GetDepthDepthSizeXY() const { return m_depth_render_target.size; }
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void SetViewportZ(uint32_t viewport_id, float zmin, float zmax)
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{
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m_screen_viewport.viewports[viewport_id].zmin = zmin;
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m_screen_viewport.viewports[viewport_id].zmax = zmax;
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}
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void SetViewportZMin(uint32_t viewport_id, float zmin) { m_screen_viewport.viewports[viewport_id].zmin = zmin; }
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void SetViewportZMax(uint32_t viewport_id, float zmax) { m_screen_viewport.viewports[viewport_id].zmax = zmax; }
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void SetViewportScaleOffset(uint32_t viewport_id, float xscale, float xoffset, float yscale, float yoffset, float zscale, float zoffset)
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{
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m_screen_viewport.viewports[viewport_id].xscale = xscale;
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@@ -550,6 +700,31 @@ public:
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m_screen_viewport.viewports[viewport_id].zscale = zscale;
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m_screen_viewport.viewports[viewport_id].zoffset = zoffset;
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}
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void SetViewportXScale(uint32_t viewport_id, float xscale) { m_screen_viewport.viewports[viewport_id].xscale = xscale; }
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void SetViewportXOffset(uint32_t viewport_id, float xoffset) { m_screen_viewport.viewports[viewport_id].xoffset = xoffset; }
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void SetViewportYScale(uint32_t viewport_id, float yscale) { m_screen_viewport.viewports[viewport_id].yscale = yscale; }
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void SetViewportYOffset(uint32_t viewport_id, float yoffset) { m_screen_viewport.viewports[viewport_id].yoffset = yoffset; }
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void SetViewportZScale(uint32_t viewport_id, float zscale) { m_screen_viewport.viewports[viewport_id].zscale = zscale; }
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void SetViewportZOffset(uint32_t viewport_id, float zoffset) { m_screen_viewport.viewports[viewport_id].zoffset = zoffset; }
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void SetViewportScissor(uint32_t viewport_id, int left, int top, int right, int bottom, bool window_offset_enable)
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{
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m_screen_viewport.viewports[viewport_id].viewport_scissor_left = left;
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m_screen_viewport.viewports[viewport_id].viewport_scissor_top = top;
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m_screen_viewport.viewports[viewport_id].viewport_scissor_right = right;
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m_screen_viewport.viewports[viewport_id].viewport_scissor_bottom = bottom;
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m_screen_viewport.viewports[viewport_id].viewport_scissor_window_offset_enable = window_offset_enable;
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}
|
||||
void SetViewportScissorTL(uint32_t viewport_id, int left, int top, bool window_offset_enable)
|
||||
{
|
||||
m_screen_viewport.viewports[viewport_id].viewport_scissor_left = left;
|
||||
m_screen_viewport.viewports[viewport_id].viewport_scissor_top = top;
|
||||
m_screen_viewport.viewports[viewport_id].viewport_scissor_window_offset_enable = window_offset_enable;
|
||||
}
|
||||
void SetViewportScissorBR(uint32_t viewport_id, int right, int bottom)
|
||||
{
|
||||
m_screen_viewport.viewports[viewport_id].viewport_scissor_right = right;
|
||||
m_screen_viewport.viewports[viewport_id].viewport_scissor_bottom = bottom;
|
||||
}
|
||||
void SetViewportTransformControl(uint32_t control) { m_screen_viewport.transform_control = control; }
|
||||
void SetScreenScissor(int left, int top, int right, int bottom)
|
||||
{
|
||||
@@ -688,8 +863,16 @@ public:
|
||||
void SetPrimitiveType(uint32_t prim_type) { m_prim_type = prim_type; }
|
||||
[[nodiscard]] uint32_t GetPrimType() const { return m_prim_type; }
|
||||
|
||||
[[nodiscard]] const GeControl& GetGeControl() const { return m_ge_cntl; }
|
||||
void SetGeControl(const GeControl& control) { m_ge_cntl = control; }
|
||||
[[nodiscard]] const GeUserVgprEn& GetGeUserVgprEn() const { return m_ge_user_vgpr_en; }
|
||||
void SetGeUserVgprEn(const GeUserVgprEn& en) { m_ge_user_vgpr_en = en; }
|
||||
|
||||
private:
|
||||
uint32_t m_prim_type = 0;
|
||||
|
||||
GeControl m_ge_cntl;
|
||||
GeUserVgprEn m_ge_user_vgpr_en;
|
||||
};
|
||||
|
||||
class Shader
|
||||
@@ -702,49 +885,75 @@ public:
|
||||
|
||||
void Reset() { *this = Shader(); }
|
||||
|
||||
void SetVsShader(const VsStageRegisters& vs_regs, uint32_t shader_modifier)
|
||||
void SetVsShaderModifier(uint32_t shader_modifier) { m_vs.vs_shader_modifier = shader_modifier; }
|
||||
void SetVsShaderBase(uint64_t addr)
|
||||
{
|
||||
m_vs.vs_regs = vs_regs;
|
||||
m_vs.vs_shader_modifier = shader_modifier;
|
||||
m_vs.vs_embedded = false;
|
||||
m_vs.vs_regs.data_addr = addr;
|
||||
m_vs.vs_embedded = false;
|
||||
}
|
||||
void SetVsShaderResource1(const VsShaderResource1& rsrc1)
|
||||
{
|
||||
m_vs.vs_regs.rsrc1 = rsrc1;
|
||||
m_vs.vs_embedded = false;
|
||||
}
|
||||
void SetVsShaderResource2(const VsShaderResource2& rsrc2)
|
||||
{
|
||||
m_vs.vs_regs.rsrc2 = rsrc2;
|
||||
m_vs.vs_embedded = false;
|
||||
}
|
||||
|
||||
void UpdateVsShader(const VsStageRegisters& vs_regs, uint32_t shader_modifier)
|
||||
{
|
||||
m_vs.vs_regs.m_spiShaderPgmLoVs = vs_regs.m_spiShaderPgmLoVs;
|
||||
m_vs.vs_regs.m_spiShaderPgmHiVs = vs_regs.m_spiShaderPgmHiVs;
|
||||
m_vs.vs_regs.m_spiShaderPgmRsrc1Vs = vs_regs.m_spiShaderPgmRsrc1Vs;
|
||||
m_vs.vs_regs.m_spiShaderPgmRsrc2Vs = vs_regs.m_spiShaderPgmRsrc2Vs;
|
||||
m_vs.vs_shader_modifier = shader_modifier;
|
||||
m_vs.vs_embedded = false;
|
||||
}
|
||||
void SetVsEmbedded(uint32_t id, uint32_t shader_modifier)
|
||||
{
|
||||
m_vs.vs_embedded_id = id;
|
||||
m_vs.vs_shader_modifier = shader_modifier;
|
||||
m_vs.vs_embedded = true;
|
||||
}
|
||||
|
||||
void SetPsShader(const PsStageRegisters& ps_regs)
|
||||
void SetEsShaderBase(uint64_t addr)
|
||||
{
|
||||
m_ps.ps_regs = ps_regs;
|
||||
m_ps.ps_embedded = false;
|
||||
m_vs.es_regs.data_addr = addr;
|
||||
m_vs.vs_embedded = false;
|
||||
}
|
||||
void UpdatePsShader(const PsStageRegisters& ps_regs)
|
||||
void SetGsShaderResource1(const GsShaderResource1& rsrc1)
|
||||
{
|
||||
m_ps.ps_regs.data_addr = ps_regs.data_addr;
|
||||
m_ps.ps_regs.vgprs = ps_regs.vgprs;
|
||||
m_ps.ps_regs.sgprs = ps_regs.sgprs;
|
||||
m_ps.ps_regs.scratch_en = ps_regs.scratch_en;
|
||||
m_ps.ps_regs.user_sgpr = ps_regs.user_sgpr;
|
||||
m_ps.ps_regs.wave_cnt_en = ps_regs.wave_cnt_en;
|
||||
m_ps.ps_embedded = false;
|
||||
m_vs.gs_regs.rsrc1 = rsrc1;
|
||||
m_vs.vs_embedded = false;
|
||||
}
|
||||
void SetGsShaderResource2(const GsShaderResource2& rsrc2)
|
||||
{
|
||||
m_vs.gs_regs.rsrc2 = rsrc2;
|
||||
m_vs.vs_embedded = false;
|
||||
}
|
||||
void SetGsShaderChksum(uint32_t value)
|
||||
{
|
||||
m_vs.gs_regs.chksum <<= 32u;
|
||||
m_vs.gs_regs.chksum |= value;
|
||||
}
|
||||
|
||||
void SetPsShaderBase(uint64_t addr)
|
||||
{
|
||||
m_ps.ps_regs.data_addr = addr;
|
||||
m_ps.ps_embedded = false;
|
||||
}
|
||||
void SetPsShaderResource1(const PsShaderResource1& rsrc1)
|
||||
{
|
||||
m_ps.ps_regs.rsrc1 = rsrc1;
|
||||
m_ps.ps_embedded = false;
|
||||
}
|
||||
void SetPsShaderResource2(const PsShaderResource2& rsrc2)
|
||||
{
|
||||
m_ps.ps_regs.rsrc2 = rsrc2;
|
||||
m_ps.ps_embedded = false;
|
||||
}
|
||||
void SetPsEmbedded(uint32_t id)
|
||||
{
|
||||
m_ps.ps_embedded_id = id;
|
||||
m_ps.ps_embedded = true;
|
||||
}
|
||||
void SetPsShaderChksum(uint32_t value)
|
||||
{
|
||||
m_ps.ps_regs.chksum <<= 32u;
|
||||
m_ps.ps_regs.chksum |= value;
|
||||
}
|
||||
|
||||
void SetCsShader(const CsStageRegisters& cs_regs, uint32_t shader_modifier)
|
||||
{
|
||||
@@ -770,6 +979,12 @@ public:
|
||||
m_cs.cs_user_sgpr.type[id] = type;
|
||||
m_cs.cs_user_sgpr.count = ((id + 1) > m_cs.cs_user_sgpr.count ? (id + 1) : m_cs.cs_user_sgpr.count);
|
||||
}
|
||||
void SetGsUserSgpr(uint32_t id, uint32_t value, UserSgprType type)
|
||||
{
|
||||
m_vs.gs_user_sgpr.value[id] = value;
|
||||
m_vs.gs_user_sgpr.type[id] = type;
|
||||
m_vs.gs_user_sgpr.count = ((id + 1) > m_vs.gs_user_sgpr.count ? (id + 1) : m_vs.gs_user_sgpr.count);
|
||||
}
|
||||
|
||||
[[nodiscard]] const PixelShaderInfo& GetPs() const { return m_ps; }
|
||||
[[nodiscard]] const VertexShaderInfo& GetVs() const { return m_vs; }
|
||||
@@ -781,36 +996,6 @@ private:
|
||||
ComputeShaderInfo m_cs;
|
||||
};
|
||||
|
||||
inline uint64_t VsStageRegisters::GetGpuAddress() const
|
||||
{
|
||||
return (static_cast<uint64_t>(m_spiShaderPgmLoVs) << 8u) | (static_cast<uint64_t>(m_spiShaderPgmHiVs) << 40u);
|
||||
}
|
||||
|
||||
inline bool VsStageRegisters::GetStreamoutEnabled() const
|
||||
{
|
||||
return (m_spiShaderPgmRsrc2Vs & 0x00001000u) != 0u;
|
||||
}
|
||||
|
||||
inline uint32_t VsStageRegisters::GetSgprCount() const
|
||||
{
|
||||
return (m_spiShaderPgmRsrc1Vs >> 6u) & 0xfu;
|
||||
}
|
||||
|
||||
inline uint32_t VsStageRegisters::GetInputComponentsCount() const
|
||||
{
|
||||
return (m_spiShaderPgmRsrc1Vs >> 24u) & 0x3u;
|
||||
}
|
||||
|
||||
inline uint32_t VsStageRegisters::GetUnknown1() const
|
||||
{
|
||||
return m_spiShaderPgmRsrc1Vs & 0xfcfffc3fu;
|
||||
}
|
||||
|
||||
inline uint32_t VsStageRegisters::GetUnknown2() const
|
||||
{
|
||||
return m_spiShaderPgmRsrc2Vs & 0xFFFFEFFFu;
|
||||
}
|
||||
|
||||
} // namespace Kyty::Libs::Graphics::HW
|
||||
|
||||
#endif // KYTY_EMU_ENABLED
|
||||
|
||||
Reference in New Issue
Block a user