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PS5 graphics (#42)

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InoriRus
2022-07-26 17:15:08 +03:00
parent 6f9200d009
commit d256e8e4b0
13 changed files with 3040 additions and 1716 deletions
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appveyor.yml
+1 -1
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@@ -1,4 +1,4 @@
version: 0.1.9.build-{build} version: 0.1.10.build-{build}
image: Visual Studio 2019 image: Visual Studio 2019
environment: environment:
matrix: matrix:
source/CMakeLists.txt
+1 -1
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@@ -82,7 +82,7 @@ if (KYTY_LINKER STREQUAL LD)
set(KYTY_LD_OPTIONS "-Wl,--image-base=0x100000000000") set(KYTY_LD_OPTIONS "-Wl,--image-base=0x100000000000")
endif() endif()
project(Kyty${KYTY_PROJECT_NAME}${CMAKE_BUILD_TYPE}${KYTY_COMPILER} VERSION 0.1.9) project(Kyty${KYTY_PROJECT_NAME}${CMAKE_BUILD_TYPE}${KYTY_COMPILER} VERSION 0.1.10)
include(src_script.cmake) include(src_script.cmake)
source/emulator/include/Emulator/Graphics/Graphics.h
+42 -22
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@@ -11,18 +11,14 @@
namespace Kyty::Libs::Graphics { namespace Kyty::Libs::Graphics {
namespace HW {
struct VsStageRegisters;
} // namespace HW
KYTY_SUBSYSTEM_DEFINE(Graphics); KYTY_SUBSYSTEM_DEFINE(Graphics);
void GraphicsDbgDumpDcb(const char* type, uint32_t num_dw, uint32_t* cmd_buffer); void GraphicsDbgDumpDcb(const char* type, uint32_t num_dw, uint32_t* cmd_buffer);
namespace Gen4 { namespace Gen4 {
int KYTY_SYSV_ABI GraphicsSetVsShader(uint32_t* cmd, uint64_t size, const HW::VsStageRegisters* vs_regs, uint32_t shader_modifier); int KYTY_SYSV_ABI GraphicsSetVsShader(uint32_t* cmd, uint64_t size, const uint32_t* vs_regs, uint32_t shader_modifier);
int KYTY_SYSV_ABI GraphicsUpdateVsShader(uint32_t* cmd, uint64_t size, const HW::VsStageRegisters* vs_regs, uint32_t shader_modifier); int KYTY_SYSV_ABI GraphicsUpdateVsShader(uint32_t* cmd, uint64_t size, const uint32_t* vs_regs, uint32_t shader_modifier);
int KYTY_SYSV_ABI GraphicsSetPsShader(uint32_t* cmd, uint64_t size, const uint32_t* ps_regs); int KYTY_SYSV_ABI GraphicsSetPsShader(uint32_t* cmd, uint64_t size, const uint32_t* ps_regs);
int KYTY_SYSV_ABI GraphicsSetPsShader350(uint32_t* cmd, uint64_t size, const uint32_t* ps_regs); int KYTY_SYSV_ABI GraphicsSetPsShader350(uint32_t* cmd, uint64_t size, const uint32_t* ps_regs);
int KYTY_SYSV_ABI GraphicsUpdatePsShader(uint32_t* cmd, uint64_t size, const uint32_t* ps_regs); int KYTY_SYSV_ABI GraphicsUpdatePsShader(uint32_t* cmd, uint64_t size, const uint32_t* ps_regs);
@@ -76,11 +72,29 @@ namespace Gen5 {
struct Shader; struct Shader;
struct CommandBuffer; struct CommandBuffer;
struct ShaderRegister; struct ShaderRegister;
struct Label;
int KYTY_SYSV_ABI GraphicsInit(uint32_t* state, uint32_t ver); int KYTY_SYSV_ABI GraphicsInit(uint32_t* state, uint32_t ver);
void* KYTY_SYSV_ABI GraphicsGetRegisterDefaults2(uint32_t ver); void* KYTY_SYSV_ABI GraphicsGetRegisterDefaults2(uint32_t ver);
void* KYTY_SYSV_ABI GraphicsGetRegisterDefaults2Internal(uint32_t ver); void* KYTY_SYSV_ABI GraphicsGetRegisterDefaults2Internal(uint32_t ver);
int KYTY_SYSV_ABI GraphicsCreateShader(Shader** dst, void* header, const volatile void* code); int KYTY_SYSV_ABI GraphicsCreateShader(Shader** dst, void* header, const volatile void* code);
int KYTY_SYSV_ABI GraphicsSetCxRegIndirectPatchSetAddress(uint32_t* cmd, const volatile ShaderRegister* regs);
int KYTY_SYSV_ABI GraphicsSetShRegIndirectPatchSetAddress(uint32_t* cmd, const volatile ShaderRegister* regs);
int KYTY_SYSV_ABI GraphicsSetUcRegIndirectPatchSetAddress(uint32_t* cmd, const volatile ShaderRegister* regs);
int KYTY_SYSV_ABI GraphicsSetCxRegIndirectPatchAddRegisters(uint32_t* cmd, uint32_t num_regs);
int KYTY_SYSV_ABI GraphicsSetShRegIndirectPatchAddRegisters(uint32_t* cmd, uint32_t num_regs);
int KYTY_SYSV_ABI GraphicsSetUcRegIndirectPatchAddRegisters(uint32_t* cmd, uint32_t num_regs);
int KYTY_SYSV_ABI GraphicsCreatePrimState(ShaderRegister* cx_regs, ShaderRegister* uc_regs, const Shader* hs, const Shader* gs,
uint32_t prim_type);
int KYTY_SYSV_ABI GraphicsCreateInterpolantMapping(ShaderRegister* regs, const Shader* gs, const Shader* ps);
int KYTY_SYSV_ABI GraphicsGetDataPacketPayloadAddress(uint32_t** addr, uint32_t* cmd, int type);
int KYTY_SYSV_ABI GraphicsSuspendPoint();
uint32_t* KYTY_SYSV_ABI GraphicsCbSetShRegisterRangeDirect(CommandBuffer* buf, uint32_t offset, const uint32_t* values,
uint32_t num_values);
uint32_t* KYTY_SYSV_ABI GraphicsCbReleaseMem(CommandBuffer* buf, uint8_t action, uint16_t gcr_cntl, uint8_t dst, uint8_t cache_policy,
const volatile Label* address, uint8_t data_sel, uint64_t data, uint16_t gds_offset,
uint16_t gds_size, uint8_t interrupt, uint32_t interrupt_ctx_id);
uint32_t* KYTY_SYSV_ABI GraphicsDcbResetQueue(CommandBuffer* buf, uint32_t op, uint32_t state); uint32_t* KYTY_SYSV_ABI GraphicsDcbResetQueue(CommandBuffer* buf, uint32_t op, uint32_t state);
uint32_t* KYTY_SYSV_ABI GraphicsDcbWaitUntilSafeForRendering(CommandBuffer* buf, uint32_t video_out_handle, uint32_t display_buffer_index); uint32_t* KYTY_SYSV_ABI GraphicsDcbWaitUntilSafeForRendering(CommandBuffer* buf, uint32_t video_out_handle, uint32_t display_buffer_index);
uint32_t* KYTY_SYSV_ABI GraphicsDcbSetCxRegistersIndirect(CommandBuffer* buf, const volatile ShaderRegister* regs, uint32_t num_regs); uint32_t* KYTY_SYSV_ABI GraphicsDcbSetCxRegistersIndirect(CommandBuffer* buf, const volatile ShaderRegister* regs, uint32_t num_regs);
@@ -88,20 +102,26 @@ uint32_t* KYTY_SYSV_ABI GraphicsDcbSetShRegistersIndirect(CommandBuffer* buf, co
uint32_t* KYTY_SYSV_ABI GraphicsDcbSetUcRegistersIndirect(CommandBuffer* buf, const volatile ShaderRegister* regs, uint32_t num_regs); uint32_t* KYTY_SYSV_ABI GraphicsDcbSetUcRegistersIndirect(CommandBuffer* buf, const volatile ShaderRegister* regs, uint32_t num_regs);
uint32_t* KYTY_SYSV_ABI GraphicsDcbSetIndexSize(CommandBuffer* buf, uint8_t index_size, uint8_t cache_policy); uint32_t* KYTY_SYSV_ABI GraphicsDcbSetIndexSize(CommandBuffer* buf, uint8_t index_size, uint8_t cache_policy);
uint32_t* KYTY_SYSV_ABI GraphicsDcbDrawIndexAuto(CommandBuffer* buf, uint32_t index_count, uint64_t modifier); uint32_t* KYTY_SYSV_ABI GraphicsDcbDrawIndexAuto(CommandBuffer* buf, uint32_t index_count, uint64_t modifier);
int KYTY_SYSV_ABI GraphicsSetCxRegIndirectPatchSetAddress(uint32_t* cmd, const volatile ShaderRegister* regs); uint32_t* KYTY_SYSV_ABI GraphicsDcbEventWrite(CommandBuffer* buf, uint8_t event_type, const volatile void* address);
int KYTY_SYSV_ABI GraphicsSetShRegIndirectPatchSetAddress(uint32_t* cmd, const volatile ShaderRegister* regs); uint32_t* KYTY_SYSV_ABI GraphicsDcbAcquireMem(CommandBuffer* buf, uint8_t engine, uint32_t cb_db_op, uint32_t gcr_cntl,
int KYTY_SYSV_ABI GraphicsSetUcRegIndirectPatchSetAddress(uint32_t* cmd, const volatile ShaderRegister* regs); const volatile void* base, uint64_t size_bytes, uint32_t poll_cycles);
int KYTY_SYSV_ABI GraphicsSetCxRegIndirectPatchAddRegisters(uint32_t* cmd, uint32_t num_regs); uint32_t* KYTY_SYSV_ABI GraphicsDcbWriteData(CommandBuffer* buf, uint8_t dst, uint8_t cache_policy, uint64_t address_or_offset,
int KYTY_SYSV_ABI GraphicsSetShRegIndirectPatchAddRegisters(uint32_t* cmd, uint32_t num_regs); const void* data, uint32_t num_dwords, uint8_t increment, uint8_t write_confirm);
int KYTY_SYSV_ABI GraphicsSetUcRegIndirectPatchAddRegisters(uint32_t* cmd, uint32_t num_regs); uint32_t* KYTY_SYSV_ABI GraphicsDcbWaitRegMem(CommandBuffer* buf, uint8_t size, uint8_t compare_function, uint8_t op, uint8_t cache_policy,
int KYTY_SYSV_ABI GraphicsCreatePrimState(ShaderRegister* cx_regs, ShaderRegister* uc_regs, const Shader* hs, const Shader* gs, const volatile void* address, uint64_t reference, uint64_t mask, uint32_t poll_cycles);
uint32_t prim_type); uint32_t* KYTY_SYSV_ABI GraphicsDcbSetFlip(CommandBuffer* buf, uint32_t video_out_handle, int32_t display_buffer_index, uint32_t flip_mode,
int KYTY_SYSV_ABI GraphicsCreateInterpolantMapping(ShaderRegister* regs, const Shader* gs, const Shader* ps); int64_t flip_arg);
uint32_t* KYTY_SYSV_ABI GraphicsCbSetShRegisterRangeDirect(CommandBuffer* buf, uint32_t offset, const uint32_t* values,
uint32_t num_values);
int KYTY_SYSV_ABI GraphicsGetDataPacketPayloadAddress(uint32_t** addr, uint32_t* cmd, int type);
} // namespace Gen5 } // namespace Gen5
namespace Gen5Driver {
struct Packet;
int KYTY_SYSV_ABI GraphicsDriverSubmitDcb(const Packet* packet);
} // namespace Gen5Driver
} // namespace Kyty::Libs::Graphics } // namespace Kyty::Libs::Graphics
#endif // KYTY_EMU_ENABLED #endif // KYTY_EMU_ENABLED
source/emulator/include/Emulator/Graphics/GraphicsRender.h
+5 -5
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@@ -11,8 +11,9 @@
namespace Kyty::Libs::Graphics { namespace Kyty::Libs::Graphics {
namespace HW { namespace HW {
class HardwareContext; class Context;
class UserConfig; class UserConfig;
class Shader;
} // namespace HW } // namespace HW
class CommandProcessor; class CommandProcessor;
@@ -55,7 +56,6 @@ public:
VulkanCommandPool* GetPool() { return m_pool; } VulkanCommandPool* GetPool() { return m_pool; }
[[nodiscard]] bool IsExecute() const { return m_execute; } [[nodiscard]] bool IsExecute() const { return m_execute; }
private: private:
VulkanCommandPool* m_pool = nullptr; VulkanCommandPool* m_pool = nullptr;
uint32_t m_index = static_cast<uint32_t>(-1); uint32_t m_index = static_cast<uint32_t>(-1);
@@ -67,9 +67,9 @@ private:
void GraphicsRenderInit(); void GraphicsRenderInit();
void GraphicsRenderCreateContext(); void GraphicsRenderCreateContext();
void GraphicsRenderDrawIndex(uint64_t submit_id, CommandBuffer* buffer, HW::HardwareContext* ctx, HW::UserConfig* ucfg, void GraphicsRenderDrawIndex(uint64_t submit_id, CommandBuffer* buffer, HW::Context* ctx, HW::UserConfig* ucfg, HW::Shader* sh_ctx,
uint32_t index_type_and_size, uint32_t index_count, const void* index_addr, uint32_t flags, uint32_t type); uint32_t index_type_and_size, uint32_t index_count, const void* index_addr, uint32_t flags, uint32_t type);
void GraphicsRenderDrawIndexAuto(uint64_t submit_id, CommandBuffer* buffer, HW::HardwareContext* ctx, HW::UserConfig* ucfg, void GraphicsRenderDrawIndexAuto(uint64_t submit_id, CommandBuffer* buffer, HW::Context* ctx, HW::UserConfig* ucfg, HW::Shader* sh_ctx,
uint32_t index_count, uint32_t flags); uint32_t index_count, uint32_t flags);
void GraphicsRenderWriteAtEndOfPipe64(uint64_t submit_id, CommandBuffer* buffer, uint64_t* dst_gpu_addr, uint64_t value); void GraphicsRenderWriteAtEndOfPipe64(uint64_t submit_id, CommandBuffer* buffer, uint64_t* dst_gpu_addr, uint64_t value);
void GraphicsRenderWriteAtEndOfPipeClockCounter(uint64_t submit_id, CommandBuffer* buffer, uint64_t* dst_gpu_addr); void GraphicsRenderWriteAtEndOfPipeClockCounter(uint64_t submit_id, CommandBuffer* buffer, uint64_t* dst_gpu_addr);
@@ -88,7 +88,7 @@ void GraphicsRenderWriteAtEndOfPipeWithInterruptWriteBack64(uint64_t submit_id,
void GraphicsRenderWriteAtEndOfPipeWithInterrupt64(uint64_t submit_id, CommandBuffer* buffer, uint64_t* dst_gpu_addr, uint64_t value); void GraphicsRenderWriteAtEndOfPipeWithInterrupt64(uint64_t submit_id, CommandBuffer* buffer, uint64_t* dst_gpu_addr, uint64_t value);
void GraphicsRenderWriteAtEndOfPipeWithInterrupt32(uint64_t submit_id, CommandBuffer* buffer, uint32_t* dst_gpu_addr, uint32_t value); void GraphicsRenderWriteAtEndOfPipeWithInterrupt32(uint64_t submit_id, CommandBuffer* buffer, uint32_t* dst_gpu_addr, uint32_t value);
void GraphicsRenderWriteBack(CommandProcessor* cp); void GraphicsRenderWriteBack(CommandProcessor* cp);
void GraphicsRenderDispatchDirect(uint64_t submit_id, CommandBuffer* buffer, HW::HardwareContext* ctx, uint32_t thread_group_x, void GraphicsRenderDispatchDirect(uint64_t submit_id, CommandBuffer* buffer, HW::Context* ctx, HW::Shader* sh_ctx, uint32_t thread_group_x,
uint32_t thread_group_y, uint32_t thread_group_z, uint32_t mode); uint32_t thread_group_y, uint32_t thread_group_z, uint32_t mode);
void GraphicsRenderMemoryBarrier(CommandBuffer* buffer); void GraphicsRenderMemoryBarrier(CommandBuffer* buffer);
void GraphicsRenderRenderTextureBarrier(CommandBuffer* buffer, uint64_t vaddr, uint64_t size); void GraphicsRenderRenderTextureBarrier(CommandBuffer* buffer, uint64_t vaddr, uint64_t size);
source/emulator/include/Emulator/Graphics/HardwareContext.h
+216 -149
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@@ -204,18 +204,18 @@ struct RenderControl
struct ClipControl struct ClipControl
{ {
uint32_t user_clip_planes = 0; uint8_t user_clip_planes = 0;
uint32_t user_clip_plane_mode = 0; uint8_t user_clip_plane_mode = 0;
uint32_t clip_space = 0; bool dx_clip_space = false;
uint32_t vertex_kill_mode = 0; bool vertex_kill_any = false;
uint32_t min_z_clip_enable = 0; bool min_z_clip_disable = false;
uint32_t max_z_clip_enable = 0; bool max_z_clip_disable = false;
bool user_clip_plane_negate_y = false; bool user_clip_plane_negate_y = false;
bool clip_enable = false; bool clip_disable = false;
bool user_clip_plane_cull_only = false; bool user_clip_plane_cull_only = false;
bool cull_on_clipping_error_disable = false; bool cull_on_clipping_error_disable = false;
bool linear_attribute_clip_enable = false; bool linear_attribute_clip_enable = false;
bool force_viewport_index_from_vs_enable = false; bool force_viewport_index_from_vs_enable = false;
}; };
struct DepthControl struct DepthControl
@@ -318,6 +318,16 @@ struct AaSampleControl
uint32_t locations[16] = {}; uint32_t locations[16] = {};
}; };
struct DepthShaderControl
{
uint32_t other_bits = 0;
uint8_t conservative_z_export_value = 0;
uint8_t shader_z_behavior = 0;
bool shader_kill_enable = false;
bool shader_z_export_enable = false;
bool shader_execute_on_noop = false;
};
struct AaConfig struct AaConfig
{ {
uint8_t msaa_num_samples = 0; uint8_t msaa_num_samples = 0;
@@ -371,10 +381,6 @@ struct VsStageRegisters
uint32_t m_spiShaderPgmRsrc1Vs = 0; uint32_t m_spiShaderPgmRsrc1Vs = 0;
uint32_t m_spiShaderPgmRsrc2Vs = 0; uint32_t m_spiShaderPgmRsrc2Vs = 0;
uint32_t m_spiVsOutConfig = 0;
uint32_t m_spiShaderPosFormat = 0;
uint32_t m_paClVsOutCntl = 0;
[[nodiscard]] uint64_t GetGpuAddress() const; [[nodiscard]] uint64_t GetGpuAddress() const;
[[nodiscard]] bool GetStreamoutEnabled() const; [[nodiscard]] bool GetStreamoutEnabled() const;
[[nodiscard]] uint32_t GetSgprCount() const; [[nodiscard]] uint32_t GetSgprCount() const;
@@ -385,26 +391,12 @@ struct VsStageRegisters
struct PsStageRegisters struct PsStageRegisters
{ {
uint64_t data_addr = 0; uint64_t data_addr = 0;
uint8_t vgprs = 0; uint8_t vgprs = 0;
uint8_t sgprs = 0; uint8_t sgprs = 0;
uint8_t scratch_en = 0; uint8_t scratch_en = 0;
uint8_t user_sgpr = 0; uint8_t user_sgpr = 0;
uint8_t wave_cnt_en = 0; uint8_t wave_cnt_en = 0;
uint32_t shader_z_format = 0;
uint8_t target_output_mode[8] = {};
uint32_t ps_input_ena = 0;
uint32_t ps_input_addr = 0;
uint32_t ps_in_control = 0;
uint32_t baryc_cntl = 0;
uint8_t conservative_z_export_value = 0;
uint8_t shader_z_behavior = 0;
bool shader_kill_enable = false;
bool shader_z_export_enable = false;
bool shader_execute_on_noop = false;
uint32_t m_cbShaderMask = 0;
}; };
struct CsStageRegisters struct CsStageRegisters
@@ -427,6 +419,42 @@ struct CsStageRegisters
uint8_t lds_size = 0; uint8_t lds_size = 0;
}; };
struct ShaderRegisters
{
uint32_t m_spiVsOutConfig = 0;
uint32_t m_spiShaderPosFormat = 0;
uint32_t m_paClVsOutCntl = 0;
uint32_t ps_interpolator_settings[32] = {0};
// uint32_t ps_input_num = 0;
uint32_t m_spiShaderIdxFormat = 0;
uint32_t m_geNggSubgrpCntl = 0;
uint32_t m_vgtGsInstanceCnt = 0;
uint32_t m_vgtGsOnchipCntl = 0;
uint32_t m_geMaxOutputPerSubgroup = 0;
uint32_t m_vgtEsgsRingItemsize = 0;
uint32_t m_vgtGsMaxVertOut = 0;
uint32_t m_vgtGsOutPrimType = 0;
uint32_t shader_z_format = 0;
uint8_t target_output_mode[8] = {};
uint32_t ps_input_ena = 0;
uint32_t ps_input_addr = 0;
uint32_t ps_in_control = 0;
uint32_t baryc_cntl = 0;
uint32_t m_cbShaderMask = 0;
uint32_t m_paScShaderControl = 0;
DepthShaderControl db_shader_control;
[[nodiscard]] uint32_t GetExportCount() const { return 1u + ((m_spiVsOutConfig >> 1u) & 0x1Fu); }
[[nodiscard]] uint32_t GetEsVertsPerSubgrp() const { return (m_vgtGsOnchipCntl >> 0u) & 0x7FFu; }
[[nodiscard]] uint32_t GetGsPrimsPerSubgrp() const { return (m_vgtGsOnchipCntl >> 11u) & 0x7FFu; }
[[nodiscard]] uint32_t GetGsInstPrimsInSubgrp() const { return (m_vgtGsOnchipCntl >> 22u) & 0x3FFu; }
};
enum class UserSgprType enum class UserSgprType
{ {
Unknown, Unknown,
@@ -453,8 +481,6 @@ struct VertexShaderInfo
struct PixelShaderInfo struct PixelShaderInfo
{ {
PsStageRegisters ps_regs; PsStageRegisters ps_regs;
uint32_t ps_interpolator_settings[32] = {0};
uint32_t ps_input_num = 0;
UserSgprInfo ps_user_sgpr; UserSgprInfo ps_user_sgpr;
uint32_t ps_embedded_id = 0; uint32_t ps_embedded_id = 0;
bool ps_embedded = false; bool ps_embedded = false;
@@ -467,15 +493,15 @@ struct ComputeShaderInfo
UserSgprInfo cs_user_sgpr; UserSgprInfo cs_user_sgpr;
}; };
class HardwareContext class Context
{ {
public: public:
HardwareContext() = default; Context() = default;
virtual ~HardwareContext() = default; virtual ~Context() = default;
KYTY_CLASS_DEFAULT_COPY(HardwareContext); KYTY_CLASS_DEFAULT_COPY(Context);
void Reset() { *this = HardwareContext(); } void Reset() { *this = Context(); }
void SetColorBase(uint32_t slot, const ColorBase& base) { m_render_targets[slot].base = base; } void SetColorBase(uint32_t slot, const ColorBase& base) { m_render_targets[slot].base = base; }
void SetColorPitch(uint32_t slot, const ColorPitch& pitch) { m_render_targets[slot].pitch = pitch; } void SetColorPitch(uint32_t slot, const ColorPitch& pitch) { m_render_targets[slot].pitch = pitch; }
@@ -554,56 +580,6 @@ public:
} }
[[nodiscard]] const ScreenViewport& GetScreenViewport() const { return m_screen_viewport; } [[nodiscard]] const ScreenViewport& GetScreenViewport() const { return m_screen_viewport; }
void SetVsShader(const VsStageRegisters* vs_regs, uint32_t shader_modifier)
{
m_vs.vs_regs = *vs_regs;
m_vs.vs_shader_modifier = shader_modifier;
m_vs.vs_embedded = false;
}
void UpdateVsShader(const VsStageRegisters* vs_regs, uint32_t shader_modifier)
{
m_vs.vs_regs.m_spiShaderPgmLoVs = vs_regs->m_spiShaderPgmLoVs;
m_vs.vs_regs.m_spiShaderPgmHiVs = vs_regs->m_spiShaderPgmHiVs;
m_vs.vs_regs.m_spiShaderPgmRsrc1Vs = vs_regs->m_spiShaderPgmRsrc1Vs;
m_vs.vs_regs.m_spiShaderPgmRsrc2Vs = vs_regs->m_spiShaderPgmRsrc2Vs;
m_vs.vs_shader_modifier = shader_modifier;
m_vs.vs_embedded = false;
}
void SetVsEmbedded(uint32_t id, uint32_t shader_modifier)
{
m_vs.vs_embedded_id = id;
m_vs.vs_shader_modifier = shader_modifier;
m_vs.vs_embedded = true;
}
void SetPsShader(const PsStageRegisters* ps_regs)
{
m_ps.ps_regs = *ps_regs;
m_ps.ps_embedded = false;
}
void UpdatePsShader(const PsStageRegisters* ps_regs)
{
m_ps.ps_regs.data_addr = ps_regs->data_addr;
m_ps.ps_regs.vgprs = ps_regs->vgprs;
m_ps.ps_regs.sgprs = ps_regs->sgprs;
m_ps.ps_regs.scratch_en = ps_regs->scratch_en;
m_ps.ps_regs.user_sgpr = ps_regs->user_sgpr;
m_ps.ps_regs.wave_cnt_en = ps_regs->wave_cnt_en;
m_ps.ps_regs.shader_z_format = ps_regs->shader_z_format;
m_ps.ps_embedded = false;
}
void SetPsEmbedded(uint32_t id)
{
m_ps.ps_embedded_id = id;
m_ps.ps_embedded = true;
}
void SetCsShader(const CsStageRegisters* cs_regs, uint32_t shader_modifier)
{
m_cs.cs_regs = *cs_regs;
m_cs.cs_shader_modifier = shader_modifier;
}
[[nodiscard]] const BlendColor& GetBlendColor() const { return m_blend_color; } [[nodiscard]] const BlendColor& GetBlendColor() const { return m_blend_color; }
void SetBlendColor(const BlendColor& color) { m_blend_color = color; } void SetBlendColor(const BlendColor& color) { m_blend_color = color; }
[[nodiscard]] const ClipControl& GetClipControl() const { return m_clip_control; } [[nodiscard]] const ClipControl& GetClipControl() const { return m_clip_control; }
@@ -629,6 +605,153 @@ public:
[[nodiscard]] const AaConfig& GetAaConfig() const { return m_aa_config; } [[nodiscard]] const AaConfig& GetAaConfig() const { return m_aa_config; }
void SetAaConfig(const AaConfig& config) { m_aa_config = config; } void SetAaConfig(const AaConfig& config) { m_aa_config = config; }
[[nodiscard]] float GetDepthClearValue() const { return m_depth_clear_value; }
void SetDepthClearValue(float clear_value) { m_depth_clear_value = clear_value; }
[[nodiscard]] uint8_t GetStencilClearValue() const { return m_stencil_clear_value; }
void SetStencilClearValue(uint8_t clear_value) { m_stencil_clear_value = clear_value; }
[[nodiscard]] float GetLineWidth() const { return m_line_width; }
void SetLineWidth(float width) { m_line_width = width; }
[[nodiscard]] const ShaderRegisters& GetShaderRegisters() const { return m_sh_regs; }
void SetVsOutConfig(uint32_t value) { m_sh_regs.m_spiVsOutConfig = value; }
void SetShaderPosFormat(uint32_t value) { m_sh_regs.m_spiShaderPosFormat = value; }
void SetClVsOutCntl(uint32_t value) { m_sh_regs.m_paClVsOutCntl = value; }
void SetShaderIdxFormat(uint32_t value) { m_sh_regs.m_spiShaderIdxFormat = value; }
void SetNggSubgrpCntl(uint32_t value) { m_sh_regs.m_geNggSubgrpCntl = value; }
void SetGsInstanceCnt(uint32_t value) { m_sh_regs.m_vgtGsInstanceCnt = value; }
void SetGsOnchipCntl(uint32_t value) { m_sh_regs.m_vgtGsOnchipCntl = value; }
void SetMaxOutputPerSubgroup(uint32_t value) { m_sh_regs.m_geMaxOutputPerSubgroup = value; }
void SetEsgsRingItemsize(uint32_t value) { m_sh_regs.m_vgtEsgsRingItemsize = value; }
void SetGsMaxVertOut(uint32_t value) { m_sh_regs.m_vgtGsMaxVertOut = value; }
void SetGsOutPrimType(uint32_t value) { m_sh_regs.m_vgtGsOutPrimType = value; }
void SetPsInputSettings(uint32_t id, uint32_t value)
{
m_sh_regs.ps_interpolator_settings[id] = value;
// m_sh_regs.ps_input_num = ((id + 1) > m_sh_regs.ps_input_num ? (id + 1) : m_sh_regs.ps_input_num);
}
void SetShaderZFormat(uint32_t value) { m_sh_regs.shader_z_format = value; }
void SetTargetOutputMode(uint32_t slot, uint8_t value) { m_sh_regs.target_output_mode[slot] = value; }
void SetPsInputEna(uint32_t value) { m_sh_regs.ps_input_ena = value; }
void SetPsInputAddr(uint32_t value) { m_sh_regs.ps_input_addr = value; }
void SetPsInControl(uint32_t value) { m_sh_regs.ps_in_control = value; }
void SetBarycCntl(uint32_t value) { m_sh_regs.baryc_cntl = value; }
void SetShaderMask(uint32_t value) { m_sh_regs.m_cbShaderMask = value; }
void SetDepthShaderControl(const DepthShaderControl& value) { m_sh_regs.db_shader_control = value; }
void SetScShaderControl(uint32_t value) { m_sh_regs.m_paScShaderControl = value; }
private:
float m_line_width = 1.0f;
BlendControl m_blend_control[8];
BlendColor m_blend_color;
RenderTarget m_render_targets[8];
uint32_t m_render_target_mask = 0;
ScreenViewport m_screen_viewport;
ClipControl m_clip_control;
ColorControl m_color_control;
ScanModeControl m_scan_mode_control;
AaSampleControl m_aa_sample_control;
AaConfig m_aa_config;
uint32_t m_shader_stages = 0;
DepthRenderTarget m_depth_render_target;
RenderControl m_render_control;
DepthControl m_depth_control;
StencilControl m_stencil_control;
StencilMask m_stencil_mask;
float m_depth_clear_value = 0.0f;
uint8_t m_stencil_clear_value = 0;
ModeControl m_mode_control;
EqaaControl m_eqaa_control;
ShaderRegisters m_sh_regs;
};
class UserConfig
{
public:
UserConfig() = default;
virtual ~UserConfig() = default;
KYTY_CLASS_DEFAULT_COPY(UserConfig);
void Reset() { *this = UserConfig(); }
void SetPrimitiveType(uint32_t prim_type) { m_prim_type = prim_type; }
[[nodiscard]] uint32_t GetPrimType() const { return m_prim_type; }
private:
uint32_t m_prim_type = 0;
};
class Shader
{
public:
Shader() = default;
virtual ~Shader() = default;
KYTY_CLASS_DEFAULT_COPY(Shader);
void Reset() { *this = Shader(); }
void SetVsShader(const VsStageRegisters& vs_regs, uint32_t shader_modifier)
{
m_vs.vs_regs = vs_regs;
m_vs.vs_shader_modifier = shader_modifier;
m_vs.vs_embedded = false;
}
void UpdateVsShader(const VsStageRegisters& vs_regs, uint32_t shader_modifier)
{
m_vs.vs_regs.m_spiShaderPgmLoVs = vs_regs.m_spiShaderPgmLoVs;
m_vs.vs_regs.m_spiShaderPgmHiVs = vs_regs.m_spiShaderPgmHiVs;
m_vs.vs_regs.m_spiShaderPgmRsrc1Vs = vs_regs.m_spiShaderPgmRsrc1Vs;
m_vs.vs_regs.m_spiShaderPgmRsrc2Vs = vs_regs.m_spiShaderPgmRsrc2Vs;
m_vs.vs_shader_modifier = shader_modifier;
m_vs.vs_embedded = false;
}
void SetVsEmbedded(uint32_t id, uint32_t shader_modifier)
{
m_vs.vs_embedded_id = id;
m_vs.vs_shader_modifier = shader_modifier;
m_vs.vs_embedded = true;
}
void SetPsShader(const PsStageRegisters& ps_regs)
{
m_ps.ps_regs = ps_regs;
m_ps.ps_embedded = false;
}
void UpdatePsShader(const PsStageRegisters& ps_regs)
{
m_ps.ps_regs.data_addr = ps_regs.data_addr;
m_ps.ps_regs.vgprs = ps_regs.vgprs;
m_ps.ps_regs.sgprs = ps_regs.sgprs;
m_ps.ps_regs.scratch_en = ps_regs.scratch_en;
m_ps.ps_regs.user_sgpr = ps_regs.user_sgpr;
m_ps.ps_regs.wave_cnt_en = ps_regs.wave_cnt_en;
m_ps.ps_embedded = false;
}
void SetPsEmbedded(uint32_t id)
{
m_ps.ps_embedded_id = id;
m_ps.ps_embedded = true;
}
void SetCsShader(const CsStageRegisters& cs_regs, uint32_t shader_modifier)
{
m_cs.cs_regs = cs_regs;
m_cs.cs_shader_modifier = shader_modifier;
}
void SetVsUserSgpr(uint32_t id, uint32_t value, UserSgprType type) void SetVsUserSgpr(uint32_t id, uint32_t value, UserSgprType type)
{ {
m_vs.vs_user_sgpr.value[id] = value; m_vs.vs_user_sgpr.value[id] = value;
@@ -647,71 +770,15 @@ public:
m_cs.cs_user_sgpr.type[id] = type; m_cs.cs_user_sgpr.type[id] = type;
m_cs.cs_user_sgpr.count = ((id + 1) > m_cs.cs_user_sgpr.count ? (id + 1) : m_cs.cs_user_sgpr.count); m_cs.cs_user_sgpr.count = ((id + 1) > m_cs.cs_user_sgpr.count ? (id + 1) : m_cs.cs_user_sgpr.count);
} }
void SetPsInputSettings(uint32_t id, uint32_t value)
{
m_ps.ps_interpolator_settings[id] = value;
m_ps.ps_input_num = ((id + 1) > m_ps.ps_input_num ? (id + 1) : m_ps.ps_input_num);
}
[[nodiscard]] const PixelShaderInfo& GetPs() const { return m_ps; } [[nodiscard]] const PixelShaderInfo& GetPs() const { return m_ps; }
[[nodiscard]] const VertexShaderInfo& GetVs() const { return m_vs; } [[nodiscard]] const VertexShaderInfo& GetVs() const { return m_vs; }
[[nodiscard]] const ComputeShaderInfo& GetCs() const { return m_cs; } [[nodiscard]] const ComputeShaderInfo& GetCs() const { return m_cs; }
[[nodiscard]] float GetDepthClearValue() const { return m_depth_clear_value; }
void SetDepthClearValue(float clear_value) { m_depth_clear_value = clear_value; }
[[nodiscard]] uint8_t GetStencilClearValue() const { return m_stencil_clear_value; }
void SetStencilClearValue(uint8_t clear_value) { m_stencil_clear_value = clear_value; }
[[nodiscard]] float GetLineWidth() const { return m_line_width; }
void SetLineWidth(float width) { m_line_width = width; }
private: private:
float m_line_width = 1.0f;
BlendControl m_blend_control[8];
BlendColor m_blend_color;
RenderTarget m_render_targets[8];
uint32_t m_render_target_mask = 0;
ScreenViewport m_screen_viewport;
ClipControl m_clip_control;
ColorControl m_color_control;
ScanModeControl m_scan_mode_control;
AaSampleControl m_aa_sample_control;
AaConfig m_aa_config;
VertexShaderInfo m_vs; VertexShaderInfo m_vs;
PixelShaderInfo m_ps; PixelShaderInfo m_ps;
ComputeShaderInfo m_cs; ComputeShaderInfo m_cs;
uint32_t m_shader_stages = 0;
DepthRenderTarget m_depth_render_target;
RenderControl m_render_control;
DepthControl m_depth_control;
StencilControl m_stencil_control;
StencilMask m_stencil_mask;
float m_depth_clear_value = 0.0f;
uint8_t m_stencil_clear_value = 0;
ModeControl m_mode_control;
EqaaControl m_eqaa_control;
};
class UserConfig
{
public:
UserConfig() = default;
virtual ~UserConfig() = default;
KYTY_CLASS_DEFAULT_COPY(UserConfig);
void Reset() { *this = UserConfig(); }
void SetPrimitiveType(uint32_t prim_type) { m_prim_type = prim_type; }
[[nodiscard]] uint32_t GetPrimType() const { return m_prim_type; }
private:
uint32_t m_prim_type = 0;
}; };
inline uint64_t VsStageRegisters::GetGpuAddress() const inline uint64_t VsStageRegisters::GetGpuAddress() const
source/emulator/include/Emulator/Graphics/Pm4.h
+326 -72
View File
@@ -14,8 +14,9 @@ class File;
#define KYTY_PM4_GET(u, r, f) (((u) >> Pm4::r##_##f##_SHIFT) & Pm4::r##_##f##_MASK) #define KYTY_PM4_GET(u, r, f) (((u) >> Pm4::r##_##f##_SHIFT) & Pm4::r##_##f##_MASK)
#define KYTY_PM4(len, op, r) \ #define KYTY_PM4(len, op, r) \
(0xC0000000u | (((static_cast<uint16_t>(len) - 2u) & 0x3fffu) << 16u) | (((op)&0xffu) << 8u) | (((r)&0x3fu) << 2u)) (0xC0000000u | (((static_cast<uint16_t>(len) - 2u) & 0x3fffu) << 16u) | (((op)&0xffu) << 8u) | (((r) & (Pm4::R_NUM - 1u)) << 2u))
#define KYTY_PM4_R(cmd_id) (((cmd_id) >> 2u) & (Pm4::R_NUM - 1u))
#define KYTY_PM4_LEN(cmd_id) ((((cmd_id) >> 16u) & 0x3fffu) + 2u) #define KYTY_PM4_LEN(cmd_id) ((((cmd_id) >> 16u) & 0x3fffu) + 2u)
namespace Kyty::Libs::Graphics::Pm4 { namespace Kyty::Libs::Graphics::Pm4 {
@@ -69,26 +70,37 @@ constexpr uint32_t IT_WAIT_ON_DE_COUNTER_DIFF = 0x88;
constexpr uint32_t IT_DISPATCH_DRAW_PREAMBLE = 0x8C; constexpr uint32_t IT_DISPATCH_DRAW_PREAMBLE = 0x8C;
constexpr uint32_t IT_DISPATCH_DRAW = 0x8D; constexpr uint32_t IT_DISPATCH_DRAW = 0x8D;
constexpr uint32_t R_ZERO = 0x00; /* Custom codes. Implemented via IT_NOP */
constexpr uint32_t R_VS = 0x01;
constexpr uint32_t R_PS = 0x02; constexpr uint32_t R_ZERO = 0x00;
constexpr uint32_t R_DRAW_INDEX = 0x03; constexpr uint32_t R_VS = 0x01;
constexpr uint32_t R_DRAW_INDEX_AUTO = 0x04; constexpr uint32_t R_PS = 0x02;
constexpr uint32_t R_DRAW_RESET = 0x05; constexpr uint32_t R_DRAW_INDEX = 0x03;
constexpr uint32_t R_WAIT_FLIP_DONE = 0x06; constexpr uint32_t R_DRAW_INDEX_AUTO = 0x04;
constexpr uint32_t R_CS = 0x07; constexpr uint32_t R_DRAW_RESET = 0x05;
constexpr uint32_t R_DISPATCH_DIRECT = 0x08; constexpr uint32_t R_WAIT_FLIP_DONE = 0x06;
constexpr uint32_t R_DISPATCH_RESET = 0x09; constexpr uint32_t R_CS = 0x07;
constexpr uint32_t R_DISPATCH_WAIT_MEM = 0x0A; constexpr uint32_t R_DISPATCH_DIRECT = 0x08;
constexpr uint32_t R_PUSH_MARKER = 0x0B; constexpr uint32_t R_DISPATCH_RESET = 0x09;
constexpr uint32_t R_POP_MARKER = 0x0C; constexpr uint32_t R_WAIT_MEM_32 = 0x0A;
constexpr uint32_t R_VS_EMBEDDED = 0x0D; constexpr uint32_t R_PUSH_MARKER = 0x0B;
constexpr uint32_t R_PS_EMBEDDED = 0x0E; constexpr uint32_t R_POP_MARKER = 0x0C;
constexpr uint32_t R_VS_UPDATE = 0x0F; constexpr uint32_t R_VS_EMBEDDED = 0x0D;
constexpr uint32_t R_PS_UPDATE = 0x10; constexpr uint32_t R_PS_EMBEDDED = 0x0E;
constexpr uint32_t R_SH_REGS = 0x11; constexpr uint32_t R_VS_UPDATE = 0x0F;
constexpr uint32_t R_CX_REGS = 0x12; constexpr uint32_t R_PS_UPDATE = 0x10;
constexpr uint32_t R_UC_REGS = 0x13; constexpr uint32_t R_SH_REGS_INDIRECT = 0x11;
constexpr uint32_t R_CX_REGS_INDIRECT = 0x12;
constexpr uint32_t R_UC_REGS_INDIRECT = 0x13;
constexpr uint32_t R_ACQUIRE_MEM = 0x14;
constexpr uint32_t R_WRITE_DATA = 0x15;
constexpr uint32_t R_WAIT_MEM_64 = 0x16;
constexpr uint32_t R_FLIP = 0x17;
constexpr uint32_t R_RELEASE_MEM = 0x18;
constexpr uint32_t R_NUM = 0x3F + 1;
/* Context registers */
constexpr uint32_t DB_RENDER_CONTROL = 0x0; constexpr uint32_t DB_RENDER_CONTROL = 0x0;
constexpr uint32_t DB_RENDER_CONTROL_DEPTH_CLEAR_ENABLE_SHIFT = 0; constexpr uint32_t DB_RENDER_CONTROL_DEPTH_CLEAR_ENABLE_SHIFT = 0;
@@ -106,14 +118,21 @@ constexpr uint32_t DB_RENDER_CONTROL_COPY_CENTROID_MASK = 0x1;
constexpr uint32_t DB_RENDER_CONTROL_COPY_SAMPLE_SHIFT = 8; constexpr uint32_t DB_RENDER_CONTROL_COPY_SAMPLE_SHIFT = 8;
constexpr uint32_t DB_RENDER_CONTROL_COPY_SAMPLE_MASK = 0xF; constexpr uint32_t DB_RENDER_CONTROL_COPY_SAMPLE_MASK = 0xF;
constexpr uint32_t DB_COUNT_CONTROL = 0x1;
constexpr uint32_t DB_DEPTH_VIEW = 0x2; constexpr uint32_t DB_DEPTH_VIEW = 0x2;
constexpr uint32_t DB_DEPTH_VIEW_SLICE_START_SHIFT = 0; constexpr uint32_t DB_DEPTH_VIEW_SLICE_START_SHIFT = 0;
constexpr uint32_t DB_DEPTH_VIEW_SLICE_START_MASK = 0x7FF; constexpr uint32_t DB_DEPTH_VIEW_SLICE_START_MASK = 0x7FF;
constexpr uint32_t DB_DEPTH_VIEW_SLICE_MAX_SHIFT = 13; constexpr uint32_t DB_DEPTH_VIEW_SLICE_MAX_SHIFT = 13;
constexpr uint32_t DB_DEPTH_VIEW_SLICE_MAX_MASK = 0x7FF; constexpr uint32_t DB_DEPTH_VIEW_SLICE_MAX_MASK = 0x7FF;
constexpr uint32_t DB_HTILE_DATA_BASE = 0x5; constexpr uint32_t DB_RENDER_OVERRIDE = 0x3;
constexpr uint32_t DB_DEPTH_SIZE_XY = 0x7; constexpr uint32_t DB_RENDER_OVERRIDE2 = 0x4;
constexpr uint32_t DB_HTILE_DATA_BASE = 0x5;
constexpr uint32_t PS_SHADER_SAMPLE_EXCLUSION_MASK = 0x6;
constexpr uint32_t DB_DEPTH_SIZE_XY = 0x7;
constexpr uint32_t DB_DEPTH_BOUNDS_MIN = 0x8;
constexpr uint32_t DB_DEPTH_BOUNDS_MAX = 0x9;
constexpr uint32_t DB_STENCIL_CLEAR = 0xA; constexpr uint32_t DB_STENCIL_CLEAR = 0xA;
constexpr uint32_t DB_STENCIL_CLEAR_CLEAR_SHIFT = 0; constexpr uint32_t DB_STENCIL_CLEAR_CLEAR_SHIFT = 0;
@@ -135,6 +154,8 @@ constexpr uint32_t PA_SC_SCREEN_SCISSOR_BR_BR_X_MASK = 0xFFFF;
constexpr uint32_t PA_SC_SCREEN_SCISSOR_BR_BR_Y_SHIFT = 16; constexpr uint32_t PA_SC_SCREEN_SCISSOR_BR_BR_Y_SHIFT = 16;
constexpr uint32_t PA_SC_SCREEN_SCISSOR_BR_BR_Y_MASK = 0xFFFF; constexpr uint32_t PA_SC_SCREEN_SCISSOR_BR_BR_Y_MASK = 0xFFFF;
constexpr uint32_t DB_DFSM_CONTROL = 0xE;
constexpr uint32_t DB_DEPTH_INFO = 0xF; constexpr uint32_t DB_DEPTH_INFO = 0xF;
constexpr uint32_t DB_DEPTH_INFO_ADDR5_SWIZZLE_MASK_SHIFT = 0; constexpr uint32_t DB_DEPTH_INFO_ADDR5_SWIZZLE_MASK_SHIFT = 0;
constexpr uint32_t DB_DEPTH_INFO_ADDR5_SWIZZLE_MASK_MASK = 0xF; constexpr uint32_t DB_DEPTH_INFO_ADDR5_SWIZZLE_MASK_MASK = 0xF;
@@ -171,15 +192,10 @@ constexpr uint32_t DB_STENCIL_INFO_TILE_MODE_INDEX_MASK = 0x7;
constexpr uint32_t DB_STENCIL_INFO_TILE_STENCIL_DISABLE_SHIFT = 29; constexpr uint32_t DB_STENCIL_INFO_TILE_STENCIL_DISABLE_SHIFT = 29;
constexpr uint32_t DB_STENCIL_INFO_TILE_STENCIL_DISABLE_MASK = 0x1; constexpr uint32_t DB_STENCIL_INFO_TILE_STENCIL_DISABLE_MASK = 0x1;
constexpr uint32_t DB_Z_READ_BASE = 0x12; constexpr uint32_t DB_Z_READ_BASE = 0x12;
constexpr uint32_t DB_STENCIL_READ_BASE = 0x13; constexpr uint32_t DB_STENCIL_READ_BASE = 0x13;
constexpr uint32_t DB_Z_WRITE_BASE = 0x14; constexpr uint32_t DB_Z_WRITE_BASE = 0x14;
constexpr uint32_t DB_STENCIL_WRITE_BASE = 0x15; constexpr uint32_t DB_STENCIL_WRITE_BASE = 0x15;
constexpr uint32_t DB_Z_READ_BASE_HI = 0x1A;
constexpr uint32_t DB_STENCIL_READ_BASE_HI = 0x1B;
constexpr uint32_t DB_Z_WRITE_BASE_HI = 0x1C;
constexpr uint32_t DB_STENCIL_WRITE_BASE_HI = 0x1D;
constexpr uint32_t DB_HTILE_DATA_BASE_HI = 0x1E;
constexpr uint32_t DB_DEPTH_SIZE = 0x16; constexpr uint32_t DB_DEPTH_SIZE = 0x16;
constexpr uint32_t DB_DEPTH_SIZE_PITCH_TILE_MAX_SHIFT = 0; constexpr uint32_t DB_DEPTH_SIZE_PITCH_TILE_MAX_SHIFT = 0;
@@ -191,6 +207,30 @@ constexpr uint32_t DB_DEPTH_SLICE = 0x17;
constexpr uint32_t DB_DEPTH_SLICE_SLICE_TILE_MAX_SHIFT = 0; constexpr uint32_t DB_DEPTH_SLICE_SLICE_TILE_MAX_SHIFT = 0;
constexpr uint32_t DB_DEPTH_SLICE_SLICE_TILE_MAX_MASK = 0x3FFFFF; constexpr uint32_t DB_DEPTH_SLICE_SLICE_TILE_MAX_MASK = 0x3FFFFF;
constexpr uint32_t DB_Z_READ_BASE_HI = 0x1A;
constexpr uint32_t DB_STENCIL_READ_BASE_HI = 0x1B;
constexpr uint32_t DB_Z_WRITE_BASE_HI = 0x1C;
constexpr uint32_t DB_STENCIL_WRITE_BASE_HI = 0x1D;
constexpr uint32_t DB_HTILE_DATA_BASE_HI = 0x1E;
constexpr uint32_t DB_RMI_L2_CACHE_CONTROL = 0x1F;
constexpr uint32_t TA_BC_BASE_ADDR = 0x20;
constexpr uint32_t TA_BC_BASE_ADDR_HI = 0x21;
constexpr uint32_t PA_SC_WINDOW_OFFSET = 0x80;
constexpr uint32_t PA_SC_WINDOW_SCISSOR_TL = 0x81;
constexpr uint32_t PA_SC_WINDOW_SCISSOR_BR = 0x82;
constexpr uint32_t PA_SC_CLIPRECT_RULE = 0x83;
constexpr uint32_t PA_SC_CLIPRECT_0_TL = 0x84;
constexpr uint32_t PA_SC_CLIPRECT_0_BR = 0x85;
constexpr uint32_t PA_SU_HARDWARE_SCREEN_OFFSET = 0x8D;
constexpr uint32_t PA_SU_HARDWARE_SCREEN_OFFSET_HW_SCREEN_OFFSET_X_SHIFT = 0;
constexpr uint32_t PA_SU_HARDWARE_SCREEN_OFFSET_HW_SCREEN_OFFSET_X_MASK = 0x1FF;
constexpr uint32_t PA_SU_HARDWARE_SCREEN_OFFSET_HW_SCREEN_OFFSET_Y_SHIFT = 16;
constexpr uint32_t PA_SU_HARDWARE_SCREEN_OFFSET_HW_SCREEN_OFFSET_Y_MASK = 0x1FF;
constexpr uint32_t CB_TARGET_MASK = 0x8E;
constexpr uint32_t CB_SHADER_MASK = 0x8F;
constexpr uint32_t PA_SC_GENERIC_SCISSOR_TL = 0x90; constexpr uint32_t PA_SC_GENERIC_SCISSOR_TL = 0x90;
constexpr uint32_t PA_SC_GENERIC_SCISSOR_TL_TL_X_SHIFT = 0; constexpr uint32_t PA_SC_GENERIC_SCISSOR_TL_TL_X_SHIFT = 0;
constexpr uint32_t PA_SC_GENERIC_SCISSOR_TL_TL_X_MASK = 0x7FFF; constexpr uint32_t PA_SC_GENERIC_SCISSOR_TL_TL_X_MASK = 0x7FFF;
@@ -205,12 +245,21 @@ constexpr uint32_t PA_SC_GENERIC_SCISSOR_BR_BR_X_MASK = 0x7FFF;
constexpr uint32_t PA_SC_GENERIC_SCISSOR_BR_BR_Y_SHIFT = 16; constexpr uint32_t PA_SC_GENERIC_SCISSOR_BR_BR_Y_SHIFT = 16;
constexpr uint32_t PA_SC_GENERIC_SCISSOR_BR_BR_Y_MASK = 0x7FFF; constexpr uint32_t PA_SC_GENERIC_SCISSOR_BR_BR_Y_MASK = 0x7FFF;
constexpr uint32_t PA_SC_VPORT_ZMIN_0 = 0xB4; constexpr uint32_t PA_SC_VPORT_SCISSOR_0_TL = 0x94;
constexpr uint32_t PA_SC_VPORT_SCISSOR_0_BR = 0x95;
constexpr uint32_t CB_BLEND_RED = 0x105; constexpr uint32_t PA_SC_VPORT_ZMIN_0 = 0xB4;
constexpr uint32_t CB_BLEND_GREEN = 0x106; constexpr uint32_t PA_SC_VPORT_ZMAX_0 = 0xB5;
constexpr uint32_t CB_BLEND_BLUE = 0x107; constexpr uint32_t PA_SC_RIGHT_VERT_GRID = 0xE8;
constexpr uint32_t CB_BLEND_ALPHA = 0x108; constexpr uint32_t PA_SC_LEFT_VERT_GRID = 0xE9;
constexpr uint32_t PA_SC_HORIZ_GRID = 0xEA;
constexpr uint32_t PA_SC_FOV_WINDOW_LR = 0xEB;
constexpr uint32_t PA_SC_FOV_WINDOW_TB = 0xEC;
constexpr uint32_t CB_RMI_GL2_CACHE_CONTROL = 0x104;
constexpr uint32_t CB_BLEND_RED = 0x105;
constexpr uint32_t CB_BLEND_GREEN = 0x106;
constexpr uint32_t CB_BLEND_BLUE = 0x107;
constexpr uint32_t CB_BLEND_ALPHA = 0x108;
constexpr uint32_t CB_DCC_CONTROL = 0x109;
constexpr uint32_t DB_STENCIL_CONTROL = 0x10B; constexpr uint32_t DB_STENCIL_CONTROL = 0x10B;
constexpr uint32_t DB_STENCIL_CONTROL_STENCILFAIL_SHIFT = 0; constexpr uint32_t DB_STENCIL_CONTROL_STENCILFAIL_SHIFT = 0;
@@ -246,9 +295,29 @@ constexpr uint32_t DB_STENCILREFMASK_BF_STENCILWRITEMASK_BF_MASK = 0xFF;
constexpr uint32_t DB_STENCILREFMASK_BF_STENCILOPVAL_BF_SHIFT = 24; constexpr uint32_t DB_STENCILREFMASK_BF_STENCILOPVAL_BF_SHIFT = 24;
constexpr uint32_t DB_STENCILREFMASK_BF_STENCILOPVAL_BF_MASK = 0xFF; constexpr uint32_t DB_STENCILREFMASK_BF_STENCILOPVAL_BF_MASK = 0xFF;
constexpr uint32_t PA_CL_VPORT_XSCALE = 0x10F; constexpr uint32_t PA_CL_VPORT_XSCALE = 0x10F;
constexpr uint32_t PA_CL_VPORT_XOFFSET = 0x110;
constexpr uint32_t SPI_PS_INPUT_CNTL_0 = 0x191; constexpr uint32_t PA_CL_VPORT_YSCALE = 0x111;
constexpr uint32_t PA_CL_VPORT_YOFFSET = 0x112;
constexpr uint32_t PA_CL_VPORT_ZSCALE = 0x113;
constexpr uint32_t PA_CL_VPORT_ZOFFSET = 0x114;
constexpr uint32_t PA_CL_UCP_0_X = 0x16F;
constexpr uint32_t PA_CL_UCP_0_Y = 0x170;
constexpr uint32_t PA_CL_UCP_0_Z = 0x171;
constexpr uint32_t PA_CL_UCP_0_W = 0x172;
constexpr uint32_t SPI_PS_INPUT_CNTL_0 = 0x191;
constexpr uint32_t SPI_PS_INPUT_CNTL_31 = 0x1B0;
constexpr uint32_t SPI_VS_OUT_CONFIG = 0x1B1;
constexpr uint32_t SPI_PS_INPUT_ENA = 0x1B3;
constexpr uint32_t SPI_PS_INPUT_ADDR = 0x1B4;
constexpr uint32_t SPI_INTERP_CONTROL_0 = 0x1B5;
constexpr uint32_t SPI_PS_IN_CONTROL = 0x1B6;
constexpr uint32_t SPI_BARYC_CNTL = 0x1B8;
constexpr uint32_t SPI_TMPRING_SIZE = 0x1BA;
constexpr uint32_t SPI_SHADER_IDX_FORMAT = 0x1C2;
constexpr uint32_t SPI_SHADER_POS_FORMAT = 0x1C3;
constexpr uint32_t SPI_SHADER_Z_FORMAT = 0x1C4;
constexpr uint32_t SPI_SHADER_COL_FORMAT = 0x1C5;
constexpr uint32_t CB_BLEND0_CONTROL = 0x1E0; constexpr uint32_t CB_BLEND0_CONTROL = 0x1E0;
constexpr uint32_t CB_BLEND0_CONTROL_COLOR_SRCBLEND_SHIFT = 0; constexpr uint32_t CB_BLEND0_CONTROL_COLOR_SRCBLEND_SHIFT = 0;
@@ -268,6 +337,8 @@ constexpr uint32_t CB_BLEND0_CONTROL_SEPARATE_ALPHA_BLEND_MASK = 0x1;
constexpr uint32_t CB_BLEND0_CONTROL_ENABLE_SHIFT = 30; constexpr uint32_t CB_BLEND0_CONTROL_ENABLE_SHIFT = 30;
constexpr uint32_t CB_BLEND0_CONTROL_ENABLE_MASK = 0x1; constexpr uint32_t CB_BLEND0_CONTROL_ENABLE_MASK = 0x1;
constexpr uint32_t GE_MAX_OUTPUT_PER_SUBGROUP = 0x1FF;
constexpr uint32_t DB_DEPTH_CONTROL = 0x200; constexpr uint32_t DB_DEPTH_CONTROL = 0x200;
constexpr uint32_t DB_DEPTH_CONTROL_STENCIL_ENABLE_SHIFT = 0; constexpr uint32_t DB_DEPTH_CONTROL_STENCIL_ENABLE_SHIFT = 0;
constexpr uint32_t DB_DEPTH_CONTROL_STENCIL_ENABLE_MASK = 0x1; constexpr uint32_t DB_DEPTH_CONTROL_STENCIL_ENABLE_MASK = 0x1;
@@ -304,12 +375,56 @@ constexpr uint32_t DB_EQAA_INTERPOLATE_COMP_Z_MASK = 0x1;
constexpr uint32_t DB_EQAA_STATIC_ANCHOR_ASSOCIATIONS_SHIFT = 20; constexpr uint32_t DB_EQAA_STATIC_ANCHOR_ASSOCIATIONS_SHIFT = 20;
constexpr uint32_t DB_EQAA_STATIC_ANCHOR_ASSOCIATIONS_MASK = 0x1; constexpr uint32_t DB_EQAA_STATIC_ANCHOR_ASSOCIATIONS_MASK = 0x1;
constexpr uint32_t DB_SHADER_CONTROL = 0x203;
constexpr uint32_t DB_SHADER_CONTROL_Z_EXPORT_ENABLE_SHIFT = 0;
constexpr uint32_t DB_SHADER_CONTROL_Z_EXPORT_ENABLE_MASK = 0x1;
constexpr uint32_t DB_SHADER_CONTROL_Z_ORDER_SHIFT = 4;
constexpr uint32_t DB_SHADER_CONTROL_Z_ORDER_MASK = 0x3;
constexpr uint32_t DB_SHADER_CONTROL_KILL_ENABLE_SHIFT = 6;
constexpr uint32_t DB_SHADER_CONTROL_KILL_ENABLE_MASK = 0x1;
constexpr uint32_t DB_SHADER_CONTROL_EXEC_ON_NOOP_SHIFT = 10;
constexpr uint32_t DB_SHADER_CONTROL_EXEC_ON_NOOP_MASK = 0x1;
constexpr uint32_t DB_SHADER_CONTROL_CONSERVATIVE_Z_EXPORT_SHIFT = 13;
constexpr uint32_t DB_SHADER_CONTROL_CONSERVATIVE_Z_EXPORT_MASK = 0x3;
constexpr uint32_t CB_COLOR_CONTROL = 0x202; constexpr uint32_t CB_COLOR_CONTROL = 0x202;
constexpr uint32_t CB_COLOR_CONTROL_MODE_SHIFT = 4; constexpr uint32_t CB_COLOR_CONTROL_MODE_SHIFT = 4;
constexpr uint32_t CB_COLOR_CONTROL_MODE_MASK = 0x7; constexpr uint32_t CB_COLOR_CONTROL_MODE_MASK = 0x7;
constexpr uint32_t CB_COLOR_CONTROL_ROP3_SHIFT = 16; constexpr uint32_t CB_COLOR_CONTROL_ROP3_SHIFT = 16;
constexpr uint32_t CB_COLOR_CONTROL_ROP3_MASK = 0xFF; constexpr uint32_t CB_COLOR_CONTROL_ROP3_MASK = 0xFF;
constexpr uint32_t PA_CL_CLIP_CNTL = 0x204;
constexpr uint32_t PA_CL_CLIP_CNTL_UCP_ENA_SHIFT = 0;
constexpr uint32_t PA_CL_CLIP_CNTL_UCP_ENA_MASK = 0x3F;
constexpr uint32_t PA_CL_CLIP_CNTL_PS_UCP_Y_SCALE_NEG_SHIFT = 13;
constexpr uint32_t PA_CL_CLIP_CNTL_PS_UCP_Y_SCALE_NEG_MASK = 0x1;
constexpr uint32_t PA_CL_CLIP_CNTL_PS_UCP_MODE_SHIFT = 14;
constexpr uint32_t PA_CL_CLIP_CNTL_PS_UCP_MODE_MASK = 0x3;
constexpr uint32_t PA_CL_CLIP_CNTL_CLIP_DISABLE_SHIFT = 16;
constexpr uint32_t PA_CL_CLIP_CNTL_CLIP_DISABLE_MASK = 0x1;
constexpr uint32_t PA_CL_CLIP_CNTL_UCP_CULL_ONLY_ENA_SHIFT = 17;
constexpr uint32_t PA_CL_CLIP_CNTL_UCP_CULL_ONLY_ENA_MASK = 0x1;
constexpr uint32_t PA_CL_CLIP_CNTL_BOUNDARY_EDGE_FLAG_ENA_SHIFT = 18;
constexpr uint32_t PA_CL_CLIP_CNTL_BOUNDARY_EDGE_FLAG_ENA_MASK = 0x1;
constexpr uint32_t PA_CL_CLIP_CNTL_DX_CLIP_SPACE_DEF_SHIFT = 19;
constexpr uint32_t PA_CL_CLIP_CNTL_DX_CLIP_SPACE_DEF_MASK = 0x1;
constexpr uint32_t PA_CL_CLIP_CNTL_DIS_CLIP_ERR_DETECT_SHIFT = 20;
constexpr uint32_t PA_CL_CLIP_CNTL_DIS_CLIP_ERR_DETECT_MASK = 0x1;
constexpr uint32_t PA_CL_CLIP_CNTL_VTX_KILL_OR_SHIFT = 21;
constexpr uint32_t PA_CL_CLIP_CNTL_VTX_KILL_OR_MASK = 0x1;
constexpr uint32_t PA_CL_CLIP_CNTL_DX_RASTERIZATION_KILL_SHIFT = 22;
constexpr uint32_t PA_CL_CLIP_CNTL_DX_RASTERIZATION_KILL_MASK = 0x1;
constexpr uint32_t PA_CL_CLIP_CNTL_DX_LINEAR_ATTR_CLIP_ENA_SHIFT = 24;
constexpr uint32_t PA_CL_CLIP_CNTL_DX_LINEAR_ATTR_CLIP_ENA_MASK = 0x1;
constexpr uint32_t PA_CL_CLIP_CNTL_VTE_VPORT_PROVOKE_DISABLE_SHIFT = 25;
constexpr uint32_t PA_CL_CLIP_CNTL_VTE_VPORT_PROVOKE_DISABLE_MASK = 0x1;
constexpr uint32_t PA_CL_CLIP_CNTL_ZCLIP_NEAR_DISABLE_SHIFT = 26;
constexpr uint32_t PA_CL_CLIP_CNTL_ZCLIP_NEAR_DISABLE_MASK = 0x1;
constexpr uint32_t PA_CL_CLIP_CNTL_ZCLIP_FAR_DISABLE_SHIFT = 27;
constexpr uint32_t PA_CL_CLIP_CNTL_ZCLIP_FAR_DISABLE_MASK = 0x1;
constexpr uint32_t PA_CL_CLIP_CNTL_ZCLIP_PROG_NEAR_ENA_SHIFT = 28;
constexpr uint32_t PA_CL_CLIP_CNTL_ZCLIP_PROG_NEAR_ENA_MASK = 0x1;
constexpr uint32_t PA_SU_SC_MODE_CNTL = 0x205; constexpr uint32_t PA_SU_SC_MODE_CNTL = 0x205;
constexpr uint32_t PA_SU_SC_MODE_CNTL_CULL_FRONT_SHIFT = 0; constexpr uint32_t PA_SU_SC_MODE_CNTL_CULL_FRONT_SHIFT = 0;
constexpr uint32_t PA_SU_SC_MODE_CNTL_CULL_FRONT_MASK = 0x1; constexpr uint32_t PA_SU_SC_MODE_CNTL_CULL_FRONT_MASK = 0x1;
@@ -334,10 +449,21 @@ constexpr uint32_t PA_SU_SC_MODE_CNTL_PROVOKING_VTX_LAST_MASK = 0x1;
constexpr uint32_t PA_SU_SC_MODE_CNTL_PERSP_CORR_DIS_SHIFT = 20; constexpr uint32_t PA_SU_SC_MODE_CNTL_PERSP_CORR_DIS_SHIFT = 20;
constexpr uint32_t PA_SU_SC_MODE_CNTL_PERSP_CORR_DIS_MASK = 0x1; constexpr uint32_t PA_SU_SC_MODE_CNTL_PERSP_CORR_DIS_MASK = 0x1;
constexpr uint32_t PA_CL_VTE_CNTL = 0x206;
constexpr uint32_t PA_CL_VS_OUT_CNTL = 0x207;
constexpr uint32_t PA_SU_SMALL_PRIM_FILTER_CNTL = 0x20C;
constexpr uint32_t PA_CL_OBJPRIM_ID_CNTL = 0x20D;
constexpr uint32_t PA_STEREO_CNTL = 0x210;
constexpr uint32_t PA_STATE_STEREO_X = 0x211;
constexpr uint32_t PA_SU_POINT_SIZE = 0x280;
constexpr uint32_t PA_SU_POINT_MINMAX = 0x281;
constexpr uint32_t PA_SU_LINE_CNTL = 0x282; constexpr uint32_t PA_SU_LINE_CNTL = 0x282;
constexpr uint32_t PA_SU_LINE_CNTL_WIDTH_SHIFT = 0; constexpr uint32_t PA_SU_LINE_CNTL_WIDTH_SHIFT = 0;
constexpr uint32_t PA_SU_LINE_CNTL_WIDTH_MASK = 0xFFFF; constexpr uint32_t PA_SU_LINE_CNTL_WIDTH_MASK = 0xFFFF;
constexpr uint32_t VGT_GS_ONCHIP_CNTL = 0x291;
constexpr uint32_t PA_SC_MODE_CNTL_0 = 0x292; constexpr uint32_t PA_SC_MODE_CNTL_0 = 0x292;
constexpr uint32_t PA_SC_MODE_CNTL_0_MSAA_ENABLE_SHIFT = 0; constexpr uint32_t PA_SC_MODE_CNTL_0_MSAA_ENABLE_SHIFT = 0;
constexpr uint32_t PA_SC_MODE_CNTL_0_MSAA_ENABLE_MASK = 0x1; constexpr uint32_t PA_SC_MODE_CNTL_0_MSAA_ENABLE_MASK = 0x1;
@@ -346,7 +472,13 @@ constexpr uint32_t PA_SC_MODE_CNTL_0_VPORT_SCISSOR_ENABLE_MASK = 0x1;
constexpr uint32_t PA_SC_MODE_CNTL_0_LINE_STIPPLE_ENABLE_SHIFT = 2; constexpr uint32_t PA_SC_MODE_CNTL_0_LINE_STIPPLE_ENABLE_SHIFT = 2;
constexpr uint32_t PA_SC_MODE_CNTL_0_LINE_STIPPLE_ENABLE_MASK = 0x1; constexpr uint32_t PA_SC_MODE_CNTL_0_LINE_STIPPLE_ENABLE_MASK = 0x1;
constexpr uint32_t VGT_GS_OUT_PRIM_TYPE = 0x29B; constexpr uint32_t PA_SC_MODE_CNTL_1 = 0x293;
constexpr uint32_t VGT_GS_OUT_PRIM_TYPE = 0x29B;
constexpr uint32_t VGT_PRIMITIVEID_EN = 0x2A1;
constexpr uint32_t VGT_PRIMITIVEID_RESET = 0x2A3;
constexpr uint32_t VGT_DRAW_PAYLOAD_CNTL = 0x2A6;
constexpr uint32_t VGT_ESGS_RING_ITEMSIZE = 0x2AB;
constexpr uint32_t VGT_REUSE_OFF = 0x2AD;
constexpr uint32_t DB_HTILE_SURFACE = 0x2AF; constexpr uint32_t DB_HTILE_SURFACE = 0x2AF;
constexpr uint32_t DB_HTILE_SURFACE_LINEAR_SHIFT = 0; constexpr uint32_t DB_HTILE_SURFACE_LINEAR_SHIFT = 0;
@@ -364,9 +496,24 @@ constexpr uint32_t DB_HTILE_SURFACE_PREFETCH_HEIGHT_MASK = 0x3F;
constexpr uint32_t DB_HTILE_SURFACE_DST_OUTSIDE_ZERO_TO_ONE_SHIFT = 16; constexpr uint32_t DB_HTILE_SURFACE_DST_OUTSIDE_ZERO_TO_ONE_SHIFT = 16;
constexpr uint32_t DB_HTILE_SURFACE_DST_OUTSIDE_ZERO_TO_ONE_MASK = 0x1; constexpr uint32_t DB_HTILE_SURFACE_DST_OUTSIDE_ZERO_TO_ONE_MASK = 0x1;
constexpr uint32_t VGT_SHADER_STAGES_EN = 0x2D5; constexpr uint32_t DB_SRESULTS_COMPARE_STATE0 = 0x2B0;
constexpr uint32_t DB_SRESULTS_COMPARE_STATE1 = 0x2B1;
constexpr uint32_t PA_SC_CENTROID_PRIORITY_0 = 0x2F5; constexpr uint32_t VGT_GS_MAX_VERT_OUT = 0x2CE;
constexpr uint32_t GE_NGG_SUBGRP_CNTL = 0x2D3;
constexpr uint32_t VGT_TESS_DISTRIBUTION = 0x2D4;
constexpr uint32_t VGT_SHADER_STAGES_EN = 0x2D5;
constexpr uint32_t VGT_LS_HS_CONFIG = 0x2D6;
constexpr uint32_t VGT_TF_PARAM = 0x2DB;
constexpr uint32_t DB_ALPHA_TO_MASK = 0x2DC;
constexpr uint32_t PA_SU_POLY_OFFSET_DB_FMT_CNTL = 0x2DE;
constexpr uint32_t PA_SU_POLY_OFFSET_CLAMP = 0x2DF;
constexpr uint32_t PA_SU_POLY_OFFSET_FRONT_SCALE = 0x2E0;
constexpr uint32_t PA_SU_POLY_OFFSET_FRONT_OFFSET = 0x2E1;
constexpr uint32_t PA_SU_POLY_OFFSET_BACK_SCALE = 0x2E2;
constexpr uint32_t PA_SU_POLY_OFFSET_BACK_OFFSET = 0x2E3;
constexpr uint32_t VGT_GS_INSTANCE_CNT = 0x2E4;
constexpr uint32_t PA_SC_CENTROID_PRIORITY_0 = 0x2F5;
constexpr uint32_t PA_SC_CENTROID_PRIORITY_1 = 0x2F6;
constexpr uint32_t PA_SC_AA_CONFIG = 0x2F8; constexpr uint32_t PA_SC_AA_CONFIG = 0x2F8;
constexpr uint32_t PA_SC_AA_CONFIG_MSAA_NUM_SAMPLES_SHIFT = 0; constexpr uint32_t PA_SC_AA_CONFIG_MSAA_NUM_SAMPLES_SHIFT = 0;
@@ -378,24 +525,52 @@ constexpr uint32_t PA_SC_AA_CONFIG_MAX_SAMPLE_DIST_MASK = 0xF;
constexpr uint32_t PA_SC_AA_CONFIG_MSAA_EXPOSED_SAMPLES_SHIFT = 20; constexpr uint32_t PA_SC_AA_CONFIG_MSAA_EXPOSED_SAMPLES_SHIFT = 20;
constexpr uint32_t PA_SC_AA_CONFIG_MSAA_EXPOSED_SAMPLES_MASK = 0x7; constexpr uint32_t PA_SC_AA_CONFIG_MSAA_EXPOSED_SAMPLES_MASK = 0x7;
constexpr uint32_t PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 = 0x2FE; constexpr uint32_t PA_SU_VTX_CNTL = 0x2F9;
constexpr uint32_t PA_CL_GB_VERT_CLIP_ADJ = 0x2FA;
constexpr uint32_t PA_CL_GB_VERT_DISC_ADJ = 0x2FB;
constexpr uint32_t PA_CL_GB_HORZ_CLIP_ADJ = 0x2FC;
constexpr uint32_t PA_CL_GB_HORZ_DISC_ADJ = 0x2FD;
constexpr uint32_t PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 = 0x2FE;
constexpr uint32_t PA_SC_AA_MASK_X0Y0_X1Y0 = 0x30E;
constexpr uint32_t PA_SC_AA_MASK_X0Y1_X1Y1 = 0x30F;
constexpr uint32_t PA_SC_SHADER_CONTROL = 0x310;
constexpr uint32_t PA_SC_BINNER_CNTL_0 = 0x311;
constexpr uint32_t PA_SC_BINNER_CNTL_1 = 0x312;
constexpr uint32_t PA_SC_CONSERVATIVE_RASTERIZATION_CNTL = 0x313;
constexpr uint32_t PA_SC_NGG_MODE_CNTL = 0x314;
constexpr uint32_t CB_COLOR0_BASE = 0x318;
constexpr uint32_t CB_COLOR0_VIEW = 0x31B;
constexpr uint32_t CB_COLOR0_INFO = 0x31C;
constexpr uint32_t CB_COLOR0_ATTRIB = 0x31D;
constexpr uint32_t CB_COLOR0_DCC_CONTROL = 0x31E;
constexpr uint32_t CB_COLOR0_CMASK = 0x31F;
constexpr uint32_t CB_COLOR0_FMASK = 0x321;
constexpr uint32_t CB_COLOR0_CLEAR_WORD0 = 0x323;
constexpr uint32_t CB_COLOR0_CLEAR_WORD1 = 0x324;
constexpr uint32_t CB_COLOR0_DCC_BASE = 0x325;
constexpr uint32_t CB_COLOR0_BASE_EXT = 0x390;
constexpr uint32_t CB_COLOR0_CMASK_BASE_EXT = 0x398;
constexpr uint32_t CB_COLOR0_FMASK_BASE_EXT = 0x3A0;
constexpr uint32_t CB_COLOR0_DCC_BASE_EXT = 0x3A8;
constexpr uint32_t CB_COLOR0_ATTRIB2 = 0x3B0;
constexpr uint32_t CB_COLOR0_ATTRIB3 = 0x3B8;
constexpr uint32_t CB_COLOR0_BASE = 0x318; /* Fake codes. Don't exist on real HW */
constexpr uint32_t CB_COLOR0_VIEW = 0x31B;
constexpr uint32_t CB_COLOR0_INFO = 0x31C; constexpr uint32_t FSR_RECURSIONS0 = 0x800003FC;
constexpr uint32_t CB_COLOR0_ATTRIB = 0x31D; constexpr uint32_t FSR_RECURSIONS1 = 0x800003FD;
constexpr uint32_t CB_COLOR0_DCC_CONTROL = 0x31E; constexpr uint32_t PA_SC_FSR_ENABLE = 0x800003FE;
constexpr uint32_t CB_COLOR0_CMASK = 0x31F; constexpr uint32_t CX_NOP = 0x800003FF;
constexpr uint32_t CB_COLOR0_FMASK = 0x321;
constexpr uint32_t CB_COLOR0_CLEAR_WORD0 = 0x323; constexpr uint32_t CX_NUM = 0x3FF + 1;
constexpr uint32_t CB_COLOR0_CLEAR_WORD1 = 0x324;
constexpr uint32_t CB_COLOR0_DCC_BASE = 0x325; /* Shader registers */
constexpr uint32_t CB_COLOR0_BASE_EXT = 0x390;
constexpr uint32_t CB_COLOR0_CMASK_BASE_EXT = 0x398; constexpr uint32_t SPI_SHADER_PGM_RSRC4_PS = 0x1;
constexpr uint32_t CB_COLOR0_FMASK_BASE_EXT = 0x3A0; constexpr uint32_t SPI_SHADER_PGM_CHKSUM_PS = 0x6;
constexpr uint32_t CB_COLOR0_DCC_BASE_EXT = 0x3A8; constexpr uint32_t SPI_SHADER_PGM_RSRC3_PS = 0x7;
constexpr uint32_t CB_COLOR0_ATTRIB2 = 0x3B0; constexpr uint32_t SPI_SHADER_PGM_LO_PS = 0x8;
constexpr uint32_t CB_COLOR0_ATTRIB3 = 0x3B8; constexpr uint32_t SPI_SHADER_PGM_HI_PS = 0x9;
constexpr uint32_t SPI_SHADER_PGM_RSRC1_PS = 0xA; constexpr uint32_t SPI_SHADER_PGM_RSRC1_PS = 0xA;
constexpr uint32_t SPI_SHADER_PGM_RSRC1_PS_VGPRS_SHIFT = 0; constexpr uint32_t SPI_SHADER_PGM_RSRC1_PS_VGPRS_SHIFT = 0;
@@ -411,11 +586,42 @@ constexpr uint32_t SPI_SHADER_PGM_RSRC2_PS_USER_SGPR_MASK = 0x1F;
constexpr uint32_t SPI_SHADER_PGM_RSRC2_PS_WAVE_CNT_EN_SHIFT = 7; constexpr uint32_t SPI_SHADER_PGM_RSRC2_PS_WAVE_CNT_EN_SHIFT = 7;
constexpr uint32_t SPI_SHADER_PGM_RSRC2_PS_WAVE_CNT_EN_MASK = 0x0; constexpr uint32_t SPI_SHADER_PGM_RSRC2_PS_WAVE_CNT_EN_MASK = 0x0;
constexpr uint32_t SPI_SHADER_USER_DATA_PS_0 = 0xC; constexpr uint32_t SPI_SHADER_USER_DATA_PS_0 = 0xC;
constexpr uint32_t SPI_SHADER_USER_DATA_PS_15 = 0x1B; constexpr uint32_t SPI_SHADER_USER_DATA_PS_15 = 0x1B;
constexpr uint32_t SPI_SHADER_USER_ACCUM_PS_0 = 0x32;
constexpr uint32_t SPI_SHADER_USER_DATA_VS_0 = 0x4C; constexpr uint32_t SPI_SHADER_USER_DATA_VS_0 = 0x4C;
constexpr uint32_t SPI_SHADER_USER_DATA_VS_15 = 0x5B; constexpr uint32_t SPI_SHADER_USER_DATA_VS_15 = 0x5B;
constexpr uint32_t SPI_SHADER_PGM_CHKSUM_GS = 0x80;
constexpr uint32_t SPI_SHADER_PGM_RSRC4_GS = 0x81;
constexpr uint32_t SPI_SHADER_USER_DATA_ADDR_LO_GS = 0x82;
constexpr uint32_t SPI_SHADER_USER_DATA_ADDR_HI_GS = 0x83;
constexpr uint32_t SPI_SHADER_PGM_RSRC3_GS = 0x87;
constexpr uint32_t SPI_SHADER_PGM_LO_GS = 0x88;
constexpr uint32_t SPI_SHADER_PGM_HI_GS = 0x89;
constexpr uint32_t SPI_SHADER_PGM_RSRC1_GS = 0x8A;
constexpr uint32_t SPI_SHADER_PGM_RSRC2_GS = 0x8B;
constexpr uint32_t SPI_SHADER_USER_DATA_GS_0 = 0x8C;
constexpr uint32_t SPI_SHADER_USER_ACCUM_ESGS_0 = 0xB2;
constexpr uint32_t SPI_SHADER_PGM_LO_ES = 0xC8;
constexpr uint32_t SPI_SHADER_PGM_HI_ES = 0xC9;
constexpr uint32_t SPI_SHADER_PGM_CHKSUM_HS = 0x100;
constexpr uint32_t SPI_SHADER_PGM_RSRC4_HS = 0x101;
constexpr uint32_t SPI_SHADER_USER_DATA_ADDR_LO_HS = 0x102;
constexpr uint32_t SPI_SHADER_USER_DATA_ADDR_HI_HS = 0x103;
constexpr uint32_t SPI_SHADER_PGM_RSRC3_HS = 0x107;
constexpr uint32_t SPI_SHADER_PGM_LO_HS = 0x108;
constexpr uint32_t SPI_SHADER_PGM_HI_HS = 0x109;
constexpr uint32_t SPI_SHADER_PGM_RSRC1_HS = 0x10A;
constexpr uint32_t SPI_SHADER_PGM_RSRC2_HS = 0x10B;
constexpr uint32_t SPI_SHADER_USER_DATA_HS_0 = 0x10C;
constexpr uint32_t SPI_SHADER_USER_ACCUM_LSHS_0 = 0x132;
constexpr uint32_t SPI_SHADER_PGM_LO_LS = 0x148;
constexpr uint32_t SPI_SHADER_PGM_HI_LS = 0x149;
constexpr uint32_t COMPUTE_START_X = 0x204;
constexpr uint32_t COMPUTE_START_Y = 0x205;
constexpr uint32_t COMPUTE_START_Z = 0x206;
constexpr uint32_t COMPUTE_PGM_LO = 0x20C;
constexpr uint32_t COMPUTE_PGM_HI = 0x20D;
constexpr uint32_t COMPUTE_PGM_RSRC1 = 0x212; constexpr uint32_t COMPUTE_PGM_RSRC1 = 0x212;
constexpr uint32_t COMPUTE_PGM_RSRC1_VGPRS_SHIFT = 0; constexpr uint32_t COMPUTE_PGM_RSRC1_VGPRS_SHIFT = 0;
@@ -443,14 +649,62 @@ constexpr uint32_t COMPUTE_PGM_RSRC2_TIDIG_COMP_CNT_MASK = 0x3;
constexpr uint32_t COMPUTE_PGM_RSRC2_LDS_SIZE_SHIFT = 15; constexpr uint32_t COMPUTE_PGM_RSRC2_LDS_SIZE_SHIFT = 15;
constexpr uint32_t COMPUTE_PGM_RSRC2_LDS_SIZE_MASK = 0x1FF; constexpr uint32_t COMPUTE_PGM_RSRC2_LDS_SIZE_MASK = 0x1FF;
constexpr uint32_t COMPUTE_USER_DATA_0 = 0x240; constexpr uint32_t COMPUTE_RESOURCE_LIMITS = 0x215;
constexpr uint32_t COMPUTE_USER_DATA_15 = 0x24F; constexpr uint32_t COMPUTE_DESTINATION_EN_SE0 = 0x216;
constexpr uint32_t COMPUTE_DESTINATION_EN_SE1 = 0x217;
constexpr uint32_t COMPUTE_TMPRING_SIZE = 0x218;
constexpr uint32_t COMPUTE_DESTINATION_EN_SE2 = 0x219;
constexpr uint32_t COMPUTE_DESTINATION_EN_SE3 = 0x21A;
constexpr uint32_t COMPUTE_USER_ACCUM_0 = 0x224;
constexpr uint32_t COMPUTE_PGM_RSRC3 = 0x228;
constexpr uint32_t COMPUTE_SHADER_CHKSUM = 0x22A;
constexpr uint32_t COMPUTE_USER_DATA_0 = 0x240;
constexpr uint32_t COMPUTE_USER_DATA_15 = 0x24F;
constexpr uint32_t COMPUTE_DISPATCH_TUNNEL = 0x27D;
/* Fake codes. Don't exist on real HW */
constexpr uint32_t SH_NOP = 0x800002FF;
constexpr uint32_t SH_NUM = 0x2FF + 1;
/* User config registers */ /* User config registers */
constexpr uint32_t GE_CNTL = 0x25b; constexpr uint32_t VGT_PRIMITIVE_TYPE = 0x242;
constexpr uint32_t GE_USER_VGPR_EN = 0x262; constexpr uint32_t VGT_OBJECT_ID = 0x248;
constexpr uint32_t PRIMITIVE_TYPE = 0x242; constexpr uint32_t GE_INDX_OFFSET = 0x24A;
constexpr uint32_t GE_MULTI_PRIM_IB_RESET_EN = 0x24B;
constexpr uint32_t VGT_HS_OFFCHIP_PARAM = 0x24F;
constexpr uint32_t VGT_TF_MEMORY_BASE = 0x250;
constexpr uint32_t GE_CNTL = 0x25B;
constexpr uint32_t GE_USER_VGPR1 = 0x25C;
constexpr uint32_t GE_USER_VGPR2 = 0x25D;
constexpr uint32_t GE_USER_VGPR3 = 0x25E;
constexpr uint32_t GE_STEREO_CNTL = 0x25F;
constexpr uint32_t GE_USER_VGPR_EN = 0x262;
constexpr uint32_t TA_CS_BC_BASE_ADDR = 0x380;
constexpr uint32_t TA_CS_BC_BASE_ADDR_HI = 0x381;
constexpr uint32_t TEXTURE_GRADIENT_FACTORS = 0x382;
constexpr uint32_t GDS_OA_CNTL = 0x41D;
constexpr uint32_t GDS_OA_COUNTER = 0x41E;
constexpr uint32_t GDS_OA_ADDRESS = 0x41F;
/* Fake codes. Don't exist on real HW */
constexpr uint32_t FSR_EXTEND_SUBPIXEL_ROUNDING = 0x80003FF4;
constexpr uint32_t FSR_ALPHA_VALUE0 = 0x80003FF5;
constexpr uint32_t FSR_ALPHA_VALUE1 = 0x80003FF6;
constexpr uint32_t FSR_CONTROL_POINT0 = 0x80003FF7;
constexpr uint32_t FSR_CONTROL_POINT1 = 0x80003FF8;
constexpr uint32_t FSR_CONTROL_POINT2 = 0x80003FF9;
constexpr uint32_t FSR_CONTROL_POINT3 = 0x80003FFA;
constexpr uint32_t FSR_WINDOW0 = 0x80003FFB;
constexpr uint32_t FSR_WINDOW1 = 0x80003FFC;
constexpr uint32_t TEXTURE_GRADIENT_CONTROL = 0x80003FFD;
constexpr uint32_t MEMORY_MAPPING_MASK = 0x80003FFE;
constexpr uint32_t UC_NOP = 0x80003FFF;
constexpr uint32_t UC_NUM = 0x3FFF + 1;
void DumpPm4PacketStream(Core::File* file, uint32_t* cmd_buffer, uint32_t start_dw, uint32_t num_dw); void DumpPm4PacketStream(Core::File* file, uint32_t* cmd_buffer, uint32_t start_dw, uint32_t num_dw);
source/emulator/include/Emulator/Graphics/Shader.h
+8 -6
View File
@@ -17,6 +17,7 @@ namespace HW {
struct VertexShaderInfo; struct VertexShaderInfo;
struct PixelShaderInfo; struct PixelShaderInfo;
struct ComputeShaderInfo; struct ComputeShaderInfo;
struct ShaderRegisters;
} // namespace HW } // namespace HW
enum class ShaderType enum class ShaderType
@@ -802,18 +803,19 @@ struct ShaderPixelInputInfo
}; };
void ShaderCalcBindingIndices(ShaderBindResources* bind); void ShaderCalcBindingIndices(ShaderBindResources* bind);
void ShaderGetInputInfoVS(const HW::VertexShaderInfo* regs, ShaderVertexInputInfo* info); void ShaderGetInputInfoVS(const HW::VertexShaderInfo* regs, const HW::ShaderRegisters* sh, ShaderVertexInputInfo* info);
void ShaderGetInputInfoPS(const HW::PixelShaderInfo* regs, const ShaderVertexInputInfo* vs_info, ShaderPixelInputInfo* ps_info); void ShaderGetInputInfoPS(const HW::PixelShaderInfo* regs, const HW::ShaderRegisters* sh, const ShaderVertexInputInfo* vs_info,
void ShaderGetInputInfoCS(const HW::ComputeShaderInfo* regs, ShaderComputeInputInfo* info); ShaderPixelInputInfo* ps_info);
void ShaderGetInputInfoCS(const HW::ComputeShaderInfo* regs, const HW::ShaderRegisters* sh, ShaderComputeInputInfo* info);
void ShaderDbgDumpInputInfo(const ShaderVertexInputInfo* info); void ShaderDbgDumpInputInfo(const ShaderVertexInputInfo* info);
void ShaderDbgDumpInputInfo(const ShaderPixelInputInfo* info); void ShaderDbgDumpInputInfo(const ShaderPixelInputInfo* info);
void ShaderDbgDumpInputInfo(const ShaderComputeInputInfo* info); void ShaderDbgDumpInputInfo(const ShaderComputeInputInfo* info);
ShaderId ShaderGetIdVS(const HW::VertexShaderInfo* regs, const ShaderVertexInputInfo* input_info); ShaderId ShaderGetIdVS(const HW::VertexShaderInfo* regs, const ShaderVertexInputInfo* input_info);
ShaderId ShaderGetIdPS(const HW::PixelShaderInfo* regs, const ShaderPixelInputInfo* input_info); ShaderId ShaderGetIdPS(const HW::PixelShaderInfo* regs, const ShaderPixelInputInfo* input_info);
ShaderId ShaderGetIdCS(const HW::ComputeShaderInfo* regs, const ShaderComputeInputInfo* input_info); ShaderId ShaderGetIdCS(const HW::ComputeShaderInfo* regs, const ShaderComputeInputInfo* input_info);
ShaderCode ShaderParseVS(const HW::VertexShaderInfo* regs); ShaderCode ShaderParseVS(const HW::VertexShaderInfo* regs, const HW::ShaderRegisters* sh);
ShaderCode ShaderParsePS(const HW::PixelShaderInfo* regs); ShaderCode ShaderParsePS(const HW::PixelShaderInfo* regs, const HW::ShaderRegisters* sh);
ShaderCode ShaderParseCS(const HW::ComputeShaderInfo* regs); ShaderCode ShaderParseCS(const HW::ComputeShaderInfo* regs, const HW::ShaderRegisters* sh);
// ShaderBindParameters ShaderGetBindParametersVS(const ShaderCode& code, const ShaderVertexInputInfo* input_info); // ShaderBindParameters ShaderGetBindParametersVS(const ShaderCode& code, const ShaderVertexInputInfo* input_info);
// ShaderBindParameters ShaderGetBindParametersPS(const ShaderCode& code, const ShaderPixelInputInfo* input_info); // ShaderBindParameters ShaderGetBindParametersPS(const ShaderCode& code, const ShaderPixelInputInfo* input_info);
// ShaderBindParameters ShaderGetBindParametersCS(const ShaderCode& code, const ShaderComputeInputInfo* input_info); // ShaderBindParameters ShaderGetBindParametersCS(const ShaderCode& code, const ShaderComputeInputInfo* input_info);
source/emulator/src/Graphics/Graphics.cpp
+970 -315
View File
File diff suppressed because it is too large Load Diff
source/emulator/src/Graphics/GraphicsRender.cpp
+67 -49
View File
@@ -138,9 +138,10 @@ public:
KYTY_CLASS_NO_COPY(PipelineCache); KYTY_CLASS_NO_COPY(PipelineCache);
VulkanPipeline* CreatePipeline(VulkanFramebuffer* framebuffer, RenderColorInfo* color, RenderDepthInfo* depth, VulkanPipeline* CreatePipeline(VulkanFramebuffer* framebuffer, RenderColorInfo* color, RenderDepthInfo* depth,
const ShaderVertexInputInfo* vs_input_info, HW::HardwareContext* ctx, const ShaderVertexInputInfo* vs_input_info, HW::Context* ctx, HW::Shader* sh_ctx,
const ShaderPixelInputInfo* ps_input_info, VkPrimitiveTopology topology); const ShaderPixelInputInfo* ps_input_info, VkPrimitiveTopology topology);
VulkanPipeline* CreatePipeline(const ShaderComputeInputInfo* input_info, const HW::ComputeShaderInfo* cs_regs); VulkanPipeline* CreatePipeline(const ShaderComputeInputInfo* input_info, const HW::ComputeShaderInfo* cs_regs,
const HW::ShaderRegisters* sh_regs);
void DeletePipeline(VulkanPipeline* pipeline); void DeletePipeline(VulkanPipeline* pipeline);
void DeletePipelines(VulkanFramebuffer* framebuffer); void DeletePipelines(VulkanFramebuffer* framebuffer);
void DeleteAllPipelines(); void DeleteAllPipelines();
@@ -468,10 +469,14 @@ static void uc_print(const char* func, const HW::UserConfig& uc)
printf("\t GetPrimType() = 0x%08" PRIx32 "\n", uc.GetPrimType()); printf("\t GetPrimType() = 0x%08" PRIx32 "\n", uc.GetPrimType());
} }
// void uc_check(const UserConfig& uc) static void uc_check(const HW::UserConfig& /*uc*/) {}
//{
// EXIT_NOT_IMPLEMENTED(uc.GetPrimType() != 4); static void sh_print(const char* func, const HW::Shader& /*uc*/)
//} {
printf("%s\n", func);
}
static void sh_check(const HW::Shader& /*uc*/) {}
static Core::StringList rt_print(const char* func, const HW::RenderTarget& rt) static Core::StringList rt_print(const char* func, const HW::RenderTarget& rt)
{ {
@@ -679,14 +684,14 @@ static void clip_print(const char* func, const HW::ClipControl& c)
{ {
printf("%s\n", func); printf("%s\n", func);
printf("\t user_clip_planes = 0x%08" PRIx32 "\n", c.user_clip_planes); printf("\t user_clip_planes = 0x%02" PRIx8 "\n", c.user_clip_planes);
printf("\t user_clip_plane_mode = 0x%08" PRIx32 "\n", c.user_clip_plane_mode); printf("\t user_clip_plane_mode = 0x%02" PRIx8 "\n", c.user_clip_plane_mode);
printf("\t clip_space = 0x%08" PRIx32 "\n", c.clip_space); printf("\t dx_clip_space = %s\n", c.dx_clip_space ? "true" : "false");
printf("\t vertex_kill_mode = 0x%08" PRIx32 "\n", c.vertex_kill_mode); printf("\t vertex_kill_any = %s\n", c.vertex_kill_any ? "true" : "false");
printf("\t min_z_clip_enable = 0x%08" PRIx32 "\n", c.min_z_clip_enable); printf("\t min_z_clip_disable = %s\n", c.min_z_clip_disable ? "true" : "false");
printf("\t max_z_clip_enable = 0x%08" PRIx32 "\n", c.max_z_clip_enable); printf("\t max_z_clip_disable = %s\n", c.max_z_clip_disable ? "true" : "false");
printf("\t user_clip_plane_negate_y = %s\n", c.user_clip_plane_negate_y ? "true" : "false"); printf("\t user_clip_plane_negate_y = %s\n", c.user_clip_plane_negate_y ? "true" : "false");
printf("\t clip_enable = %s\n", c.clip_enable ? "true" : "false"); printf("\t clip_disable = %s\n", c.clip_disable ? "true" : "false");
printf("\t user_clip_plane_cull_only = %s\n", c.user_clip_plane_cull_only ? "true" : "false"); printf("\t user_clip_plane_cull_only = %s\n", c.user_clip_plane_cull_only ? "true" : "false");
printf("\t cull_on_clipping_error_disable = %s\n", c.cull_on_clipping_error_disable ? "true" : "false"); printf("\t cull_on_clipping_error_disable = %s\n", c.cull_on_clipping_error_disable ? "true" : "false");
printf("\t linear_attribute_clip_enable = %s\n", c.linear_attribute_clip_enable ? "true" : "false"); printf("\t linear_attribute_clip_enable = %s\n", c.linear_attribute_clip_enable ? "true" : "false");
@@ -697,12 +702,12 @@ static void clip_check(const HW::ClipControl& c)
{ {
EXIT_NOT_IMPLEMENTED(c.user_clip_planes != 0); EXIT_NOT_IMPLEMENTED(c.user_clip_planes != 0);
EXIT_NOT_IMPLEMENTED(c.user_clip_plane_mode != 0); EXIT_NOT_IMPLEMENTED(c.user_clip_plane_mode != 0);
EXIT_NOT_IMPLEMENTED(c.clip_space != 0); EXIT_NOT_IMPLEMENTED(c.dx_clip_space != false);
EXIT_NOT_IMPLEMENTED(c.vertex_kill_mode != 0); EXIT_NOT_IMPLEMENTED(c.vertex_kill_any != false);
EXIT_NOT_IMPLEMENTED(c.min_z_clip_enable != 0); EXIT_NOT_IMPLEMENTED(c.min_z_clip_disable != false);
EXIT_NOT_IMPLEMENTED(c.max_z_clip_enable != 0); EXIT_NOT_IMPLEMENTED(c.max_z_clip_disable != false);
EXIT_NOT_IMPLEMENTED(c.user_clip_plane_negate_y != false); EXIT_NOT_IMPLEMENTED(c.user_clip_plane_negate_y != false);
EXIT_NOT_IMPLEMENTED(c.clip_enable != false); EXIT_NOT_IMPLEMENTED(c.clip_disable != false);
EXIT_NOT_IMPLEMENTED(c.user_clip_plane_cull_only != false); EXIT_NOT_IMPLEMENTED(c.user_clip_plane_cull_only != false);
EXIT_NOT_IMPLEMENTED(c.cull_on_clipping_error_disable != false); EXIT_NOT_IMPLEMENTED(c.cull_on_clipping_error_disable != false);
EXIT_NOT_IMPLEMENTED(c.linear_attribute_clip_enable != false); EXIT_NOT_IMPLEMENTED(c.linear_attribute_clip_enable != false);
@@ -986,7 +991,7 @@ static void vp_check(const HW::ScreenViewport& vp, const HW::ScanModeControl& sm
EXIT_NOT_IMPLEMENTED(vp.viewports[0].viewport_scissor_window_offset_enable != false); EXIT_NOT_IMPLEMENTED(vp.viewports[0].viewport_scissor_window_offset_enable != false);
} }
static void hw_check(const HW::HardwareContext& hw) static void hw_check(const HW::Context& hw)
{ {
const auto& rt = hw.GetRenderTarget(0); const auto& rt = hw.GetRenderTarget(0);
const auto& bc = hw.GetBlendControl(0); const auto& bc = hw.GetBlendControl(0);
@@ -1021,7 +1026,7 @@ static void hw_check(const HW::HardwareContext& hw)
// EXIT_NOT_IMPLEMENTED(hw.GetStencilClearValue() != 0); // EXIT_NOT_IMPLEMENTED(hw.GetStencilClearValue() != 0);
} }
static void hw_print(const HW::HardwareContext& hw) static void hw_print(const HW::Context& hw)
{ {
const auto& rt = hw.GetRenderTarget(0); const auto& rt = hw.GetRenderTarget(0);
const auto& bc = hw.GetBlendControl(0); const auto& bc = hw.GetBlendControl(0);
@@ -1042,7 +1047,7 @@ static void hw_print(const HW::HardwareContext& hw)
if (Kyty::Log::GetDirection() != Kyty::Log::Direction::Silent) if (Kyty::Log::GetDirection() != Kyty::Log::Direction::Silent)
{ {
printf("HardwareContext\n"); printf("Context\n");
printf("\t GetRenderTargetMask() = 0x%08" PRIx32 "\n", hw.GetRenderTargetMask()); printf("\t GetRenderTargetMask() = 0x%08" PRIx32 "\n", hw.GetRenderTargetMask());
printf("\t GetDepthClearValue() = %f\n", hw.GetDepthClearValue()); printf("\t GetDepthClearValue() = %f\n", hw.GetDepthClearValue());
printf("\t GetStencilClearValue() = %" PRIu8 "\n", hw.GetStencilClearValue()); printf("\t GetStencilClearValue() = %" PRIu8 "\n", hw.GetStencilClearValue());
@@ -2345,7 +2350,7 @@ VulkanPipeline* PipelineCache::Find(const Pipeline& p) const
} }
VulkanPipeline* PipelineCache::CreatePipeline(VulkanFramebuffer* framebuffer, RenderColorInfo* color, RenderDepthInfo* depth, VulkanPipeline* PipelineCache::CreatePipeline(VulkanFramebuffer* framebuffer, RenderColorInfo* color, RenderDepthInfo* depth,
const ShaderVertexInputInfo* vs_input_info, HW::HardwareContext* ctx, const ShaderVertexInputInfo* vs_input_info, HW::Context* ctx, HW::Shader* sh_ctx,
const ShaderPixelInputInfo* ps_input_info, VkPrimitiveTopology topology) const ShaderPixelInputInfo* ps_input_info, VkPrimitiveTopology topology)
{ {
KYTY_PROFILER_BLOCK("PipelineCache::CreatePipeline(Gfx)", profiler::colors::DeepOrangeA200); KYTY_PROFILER_BLOCK("PipelineCache::CreatePipeline(Gfx)", profiler::colors::DeepOrangeA200);
@@ -2356,8 +2361,9 @@ VulkanPipeline* PipelineCache::CreatePipeline(VulkanFramebuffer* framebuffer, Re
Core::LockGuard lock(m_mutex); Core::LockGuard lock(m_mutex);
const auto& vs_regs = ctx->GetVs(); const auto& vs_regs = sh_ctx->GetVs();
const auto& ps_regs = ctx->GetPs(); const auto& ps_regs = sh_ctx->GetPs();
const auto& sh_regs = ctx->GetShaderRegisters();
const HW::BlendColor& bclr = ctx->GetBlendColor(); const HW::BlendColor& bclr = ctx->GetBlendColor();
const HW::ScreenViewport& vp = ctx->GetScreenViewport(); const HW::ScreenViewport& vp = ctx->GetScreenViewport();
const auto& bc = ctx->GetBlendControl(0); const auto& bc = ctx->GetBlendControl(0);
@@ -2445,8 +2451,8 @@ VulkanPipeline* PipelineCache::CreatePipeline(VulkanFramebuffer* framebuffer, Re
return found; return found;
} }
auto vs_code = ShaderParseVS(&vs_regs); auto vs_code = ShaderParseVS(&vs_regs, &sh_regs);
auto ps_code = ShaderParsePS(&ps_regs); auto ps_code = ShaderParsePS(&ps_regs, &sh_regs);
auto vs_shader = ShaderRecompileVS(vs_code, vs_input_info); auto vs_shader = ShaderRecompileVS(vs_code, vs_input_info);
auto ps_shader = ShaderRecompilePS(ps_code, ps_input_info); auto ps_shader = ShaderRecompilePS(ps_code, ps_input_info);
@@ -2497,11 +2503,13 @@ VulkanPipeline* PipelineCache::CreatePipeline(VulkanFramebuffer* framebuffer, Re
return p.pipeline; return p.pipeline;
} }
VulkanPipeline* PipelineCache::CreatePipeline(const ShaderComputeInputInfo* input_info, const HW::ComputeShaderInfo* cs_regs) VulkanPipeline* PipelineCache::CreatePipeline(const ShaderComputeInputInfo* input_info, const HW::ComputeShaderInfo* cs_regs,
const HW::ShaderRegisters* sh_regs)
{ {
KYTY_PROFILER_BLOCK("PipelineCache::CreatePipeline(Compute)", profiler::colors::RedA100); KYTY_PROFILER_BLOCK("PipelineCache::CreatePipeline(Compute)", profiler::colors::RedA100);
EXIT_IF(cs_regs == nullptr); EXIT_IF(cs_regs == nullptr);
EXIT_IF(sh_regs == nullptr);
Core::LockGuard lock(m_mutex); Core::LockGuard lock(m_mutex);
@@ -2530,7 +2538,7 @@ VulkanPipeline* PipelineCache::CreatePipeline(const ShaderComputeInputInfo* inpu
return found; return found;
} }
auto cs_code = ShaderParseCS(cs_regs); auto cs_code = ShaderParseCS(cs_regs, sh_regs);
auto cs_shader = ShaderRecompileCS(cs_code, input_info); auto cs_shader = ShaderRecompileCS(cs_code, input_info);
EXIT_IF(cs_shader.IsEmpty()); EXIT_IF(cs_shader.IsEmpty());
@@ -3612,7 +3620,7 @@ void GraphicsRenderDepthStencilBarrier(CommandBuffer* buffer, uint64_t vaddr, ui
} }
// NOLINTNEXTLINE(readability-function-cognitive-complexity) // NOLINTNEXTLINE(readability-function-cognitive-complexity)
static void FindRenderDepthInfo(uint64_t submit_id, CommandBuffer* /*buffer*/, const HW::HardwareContext& hw, RenderDepthInfo* r) static void FindRenderDepthInfo(uint64_t submit_id, CommandBuffer* /*buffer*/, const HW::Context& hw, RenderDepthInfo* r)
{ {
KYTY_PROFILER_FUNCTION(); KYTY_PROFILER_FUNCTION();
@@ -3772,7 +3780,7 @@ static void FindRenderDepthInfo(uint64_t submit_id, CommandBuffer* /*buffer*/, c
} }
// NOLINTNEXTLINE(readability-function-cognitive-complexity) // NOLINTNEXTLINE(readability-function-cognitive-complexity)
static void FindRenderColorInfo(uint64_t submit_id, CommandBuffer* buffer, const HW::HardwareContext& hw, RenderColorInfo* r) static void FindRenderColorInfo(uint64_t submit_id, CommandBuffer* buffer, const HW::Context& hw, RenderColorInfo* r)
{ {
KYTY_PROFILER_FUNCTION(); KYTY_PROFILER_FUNCTION();
@@ -4313,7 +4321,7 @@ static void SetDynamicParams(VkCommandBuffer vk_buffer, VulkanPipeline* pipeline
} }
} }
void GraphicsRenderDrawIndex(uint64_t submit_id, CommandBuffer* buffer, HW::HardwareContext* ctx, HW::UserConfig* ucfg, void GraphicsRenderDrawIndex(uint64_t submit_id, CommandBuffer* buffer, HW::Context* ctx, HW::UserConfig* ucfg, HW::Shader* sh_ctx,
uint32_t index_type_and_size, uint32_t index_count, const void* index_addr, uint32_t flags, uint32_t type) uint32_t index_type_and_size, uint32_t index_count, const void* index_addr, uint32_t flags, uint32_t type)
{ {
KYTY_PROFILER_FUNCTION(); KYTY_PROFILER_FUNCTION();
@@ -4326,17 +4334,21 @@ void GraphicsRenderDrawIndex(uint64_t submit_id, CommandBuffer* buffer, HW::Hard
Core::LockGuard lock(g_render_ctx->GetMutex()); Core::LockGuard lock(g_render_ctx->GetMutex());
if (const auto& vs = ctx->GetVs(); !vs.vs_embedded && ShaderIsDisabled(vs.vs_regs.GetGpuAddress())) if (const auto& vs = sh_ctx->GetVs(); !vs.vs_embedded && ShaderIsDisabled(vs.vs_regs.GetGpuAddress()))
{ {
return; return;
} }
if (const auto& ps = ctx->GetPs(); !ps.ps_embedded && ShaderIsDisabled(ps.ps_regs.data_addr)) if (const auto& ps = sh_ctx->GetPs(); !ps.ps_embedded && ShaderIsDisabled(ps.ps_regs.data_addr))
{ {
return; return;
} }
sh_print("GraphicsRenderDrawIndex():Shader:", *sh_ctx);
sh_check(*sh_ctx);
uc_print("GraphicsRenderDrawIndex():UserConfig:", *ucfg); uc_print("GraphicsRenderDrawIndex():UserConfig:", *ucfg);
uc_check(*ucfg);
hw_print(*ctx); hw_print(*ctx);
hw_check(*ctx); hw_check(*ctx);
@@ -4394,12 +4406,12 @@ void GraphicsRenderDrawIndex(uint64_t submit_id, CommandBuffer* buffer, HW::Hard
auto* vk_buffer = buffer->GetPool()->buffers[buffer->GetIndex()]; auto* vk_buffer = buffer->GetPool()->buffers[buffer->GetIndex()];
ShaderVertexInputInfo vs_input_info; ShaderVertexInputInfo vs_input_info;
ShaderGetInputInfoVS(&ctx->GetVs(), &vs_input_info); ShaderGetInputInfoVS(&sh_ctx->GetVs(), &ctx->GetShaderRegisters(), &vs_input_info);
ShaderPixelInputInfo ps_input_info; ShaderPixelInputInfo ps_input_info;
ShaderGetInputInfoPS(&ctx->GetPs(), &vs_input_info, &ps_input_info); ShaderGetInputInfoPS(&sh_ctx->GetPs(), &ctx->GetShaderRegisters(), &vs_input_info, &ps_input_info);
auto* pipeline = g_render_ctx->GetPipelineCache()->CreatePipeline(framebuffer, &color_info, &depth_info, &vs_input_info, ctx, auto* pipeline = g_render_ctx->GetPipelineCache()->CreatePipeline(framebuffer, &color_info, &depth_info, &vs_input_info, ctx, sh_ctx,
&ps_input_info, topology); &ps_input_info, topology);
// EXIT_NOT_IMPLEMENTED(vs_input_info.buffers_num > 1); // EXIT_NOT_IMPLEMENTED(vs_input_info.buffers_num > 1);
@@ -4459,7 +4471,7 @@ void GraphicsRenderDrawIndex(uint64_t submit_id, CommandBuffer* buffer, HW::Hard
} }
// NOLINTNEXTLINE(readability-function-cognitive-complexity) // NOLINTNEXTLINE(readability-function-cognitive-complexity)
void GraphicsRenderDrawIndexAuto(uint64_t submit_id, CommandBuffer* buffer, HW::HardwareContext* ctx, HW::UserConfig* ucfg, void GraphicsRenderDrawIndexAuto(uint64_t submit_id, CommandBuffer* buffer, HW::Context* ctx, HW::UserConfig* ucfg, HW::Shader* sh_ctx,
uint32_t index_count, uint32_t flags) uint32_t index_count, uint32_t flags)
{ {
KYTY_PROFILER_FUNCTION(); KYTY_PROFILER_FUNCTION();
@@ -4470,17 +4482,21 @@ void GraphicsRenderDrawIndexAuto(uint64_t submit_id, CommandBuffer* buffer, HW::
Core::LockGuard lock(g_render_ctx->GetMutex()); Core::LockGuard lock(g_render_ctx->GetMutex());
if (const auto& vs = ctx->GetVs(); !vs.vs_embedded && ShaderIsDisabled(vs.vs_regs.GetGpuAddress())) if (const auto& vs = sh_ctx->GetVs(); !vs.vs_embedded && ShaderIsDisabled(vs.vs_regs.GetGpuAddress()))
{ {
return; return;
} }
if (const auto& ps = ctx->GetPs(); !ps.ps_embedded && ShaderIsDisabled(ps.ps_regs.data_addr)) if (const auto& ps = sh_ctx->GetPs(); !ps.ps_embedded && ShaderIsDisabled(ps.ps_regs.data_addr))
{ {
return; return;
} }
sh_print("GraphicsRenderDrawIndexAuto():Shader:", *sh_ctx);
sh_check(*sh_ctx);
uc_print("GraphicsRenderDrawIndexAuto():UserConfig:", *ucfg); uc_print("GraphicsRenderDrawIndexAuto():UserConfig:", *ucfg);
uc_check(*ucfg);
hw_print(*ctx); hw_print(*ctx);
hw_check(*ctx); hw_check(*ctx);
@@ -4515,16 +4531,17 @@ void GraphicsRenderDrawIndexAuto(uint64_t submit_id, CommandBuffer* buffer, HW::
default: EXIT("unknown primitive type: %u\n", ucfg->GetPrimType()); default: EXIT("unknown primitive type: %u\n", ucfg->GetPrimType());
} }
const auto& vertex_shader_info = ctx->GetVs(); const auto& vertex_shader_info = sh_ctx->GetVs();
const auto& pixel_shader_info = ctx->GetPs(); const auto& pixel_shader_info = sh_ctx->GetPs();
const auto& shader_regs = ctx->GetShaderRegisters();
ShaderVertexInputInfo vs_input_info; ShaderVertexInputInfo vs_input_info;
ShaderGetInputInfoVS(&vertex_shader_info, &vs_input_info); ShaderGetInputInfoVS(&vertex_shader_info, &shader_regs, &vs_input_info);
ShaderPixelInputInfo ps_input_info; ShaderPixelInputInfo ps_input_info;
ShaderGetInputInfoPS(&pixel_shader_info, &vs_input_info, &ps_input_info); ShaderGetInputInfoPS(&pixel_shader_info, &shader_regs, &vs_input_info, &ps_input_info);
auto* pipeline = g_render_ctx->GetPipelineCache()->CreatePipeline(framebuffer, &color_info, &depth_info, &vs_input_info, ctx, auto* pipeline = g_render_ctx->GetPipelineCache()->CreatePipeline(framebuffer, &color_info, &depth_info, &vs_input_info, ctx, sh_ctx,
&ps_input_info, topology); &ps_input_info, topology);
// EXIT_NOT_IMPLEMENTED(vs_input_info.buffers_num > 1); // EXIT_NOT_IMPLEMENTED(vs_input_info.buffers_num > 1);
@@ -4578,7 +4595,7 @@ void GraphicsRenderDrawIndexAuto(uint64_t submit_id, CommandBuffer* buffer, HW::
InvalidateMemoryObject(depth_info); InvalidateMemoryObject(depth_info);
} }
void GraphicsRenderDispatchDirect(uint64_t submit_id, CommandBuffer* buffer, HW::HardwareContext* ctx, uint32_t thread_group_x, void GraphicsRenderDispatchDirect(uint64_t submit_id, CommandBuffer* buffer, HW::Context* ctx, HW::Shader* sh_ctx, uint32_t thread_group_x,
uint32_t thread_group_y, uint32_t thread_group_z, uint32_t mode) uint32_t thread_group_y, uint32_t thread_group_z, uint32_t mode)
{ {
EXIT_IF(ctx == nullptr); EXIT_IF(ctx == nullptr);
@@ -4588,21 +4605,22 @@ void GraphicsRenderDispatchDirect(uint64_t submit_id, CommandBuffer* buffer, HW:
Core::LockGuard lock(g_render_ctx->GetMutex()); Core::LockGuard lock(g_render_ctx->GetMutex());
if (ShaderIsDisabled(ctx->GetCs().cs_regs.data_addr)) if (ShaderIsDisabled(sh_ctx->GetCs().cs_regs.data_addr))
{ {
return; return;
} }
EXIT_NOT_IMPLEMENTED(mode != 0); EXIT_NOT_IMPLEMENTED(mode != 0);
const auto& cs_regs = ctx->GetCs(); const auto& cs_regs = sh_ctx->GetCs();
const auto& sh_regs = ctx->GetShaderRegisters();
ShaderComputeInputInfo input_info; ShaderComputeInputInfo input_info;
ShaderGetInputInfoCS(&cs_regs, &input_info); ShaderGetInputInfoCS(&cs_regs, &sh_regs, &input_info);
auto* vk_buffer = buffer->GetPool()->buffers[buffer->GetIndex()]; auto* vk_buffer = buffer->GetPool()->buffers[buffer->GetIndex()];
auto* pipeline = g_render_ctx->GetPipelineCache()->CreatePipeline(&input_info, &ctx->GetCs()); auto* pipeline = g_render_ctx->GetPipelineCache()->CreatePipeline(&input_info, &sh_ctx->GetCs(), &ctx->GetShaderRegisters());
vkCmdBindPipeline(vk_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, pipeline->pipeline); vkCmdBindPipeline(vk_buffer, VK_PIPELINE_BIND_POINT_COMPUTE, pipeline->pipeline);
source/emulator/src/Graphics/GraphicsRun.cpp
+1241 -1012
View File
File diff suppressed because it is too large Load Diff
source/emulator/src/Graphics/Pm4.cpp
+41 -24
View File
@@ -7,9 +7,9 @@
namespace Kyty::Libs::Graphics::Pm4 { namespace Kyty::Libs::Graphics::Pm4 {
static const char* g_names[256] = {}; static const char* g_names[256] = {};
static const char* g_r_names[64] = {}; static const char* g_r_names[Pm4::R_NUM] = {};
static bool g_names_initialized = false; static bool g_names_initialized = false;
static void init_names() static void init_names()
{ {
@@ -25,26 +25,31 @@ static void init_names()
n = "<unknown>"; n = "<unknown>";
} }
g_r_names[R_ZERO] = "R_ZERO"; g_r_names[R_ZERO] = "R_ZERO";
g_r_names[R_VS] = "R_VS"; g_r_names[R_VS] = "R_VS";
g_r_names[R_PS] = "R_PS"; g_r_names[R_PS] = "R_PS";
g_r_names[R_DRAW_INDEX] = "R_DRAW_INDEX"; g_r_names[R_DRAW_INDEX] = "R_DRAW_INDEX";
g_r_names[R_DRAW_INDEX_AUTO] = "R_DRAW_INDEX_AUTO"; g_r_names[R_DRAW_INDEX_AUTO] = "R_DRAW_INDEX_AUTO";
g_r_names[R_DRAW_RESET] = "R_DRAW_RESET"; g_r_names[R_DRAW_RESET] = "R_DRAW_RESET";
g_r_names[R_WAIT_FLIP_DONE] = "R_WAIT_FLIP_DONE"; g_r_names[R_WAIT_FLIP_DONE] = "R_WAIT_FLIP_DONE";
g_r_names[R_CS] = "R_CS"; g_r_names[R_CS] = "R_CS";
g_r_names[R_DISPATCH_DIRECT] = "R_DISPATCH_DIRECT"; g_r_names[R_DISPATCH_DIRECT] = "R_DISPATCH_DIRECT";
g_r_names[R_DISPATCH_RESET] = "R_DISPATCH_RESET"; g_r_names[R_DISPATCH_RESET] = "R_DISPATCH_RESET";
g_r_names[R_DISPATCH_WAIT_MEM] = "R_DISPATCH_WAIT_MEM"; g_r_names[R_WAIT_MEM_32] = "R_WAIT_MEM_32";
g_r_names[R_PUSH_MARKER] = "R_PUSH_MARKER"; g_r_names[R_PUSH_MARKER] = "R_PUSH_MARKER";
g_r_names[R_POP_MARKER] = "R_POP_MARKER"; g_r_names[R_POP_MARKER] = "R_POP_MARKER";
g_r_names[R_VS_EMBEDDED] = "R_VS_EMBEDDED"; g_r_names[R_VS_EMBEDDED] = "R_VS_EMBEDDED";
g_r_names[R_PS_EMBEDDED] = "R_PS_EMBEDDED"; g_r_names[R_PS_EMBEDDED] = "R_PS_EMBEDDED";
g_r_names[R_VS_UPDATE] = "R_VS_UPDATE"; g_r_names[R_VS_UPDATE] = "R_VS_UPDATE";
g_r_names[R_PS_UPDATE] = "R_PS_UPDATE"; g_r_names[R_PS_UPDATE] = "R_PS_UPDATE";
g_r_names[R_CX_REGS] = "R_CX_REGS"; g_r_names[R_CX_REGS_INDIRECT] = "R_CX_REGS_INDIRECT";
g_r_names[R_SH_REGS] = "R_SH_REGS"; g_r_names[R_SH_REGS_INDIRECT] = "R_SH_REGS_INDIRECT";
g_r_names[R_UC_REGS] = "R_UC_REGS"; g_r_names[R_UC_REGS_INDIRECT] = "R_UC_REGS_INDIRECT";
g_r_names[R_ACQUIRE_MEM] = "R_ACQUIRE_MEM";
g_r_names[R_WRITE_DATA] = "R_WRITE_DATA";
g_r_names[R_WAIT_MEM_64] = "R_WAIT_MEM_64";
g_r_names[R_FLIP] = "R_FLIP";
g_r_names[R_RELEASE_MEM] = "R_RELEASE_MEM";
g_names[IT_NOP] = "IT_NOP"; g_names[IT_NOP] = "IT_NOP";
g_names[IT_SET_BASE] = "IT_SET_BASE"; g_names[IT_SET_BASE] = "IT_SET_BASE";
@@ -131,7 +136,7 @@ void DumpPm4PacketStream(Core::File* file, uint32_t* cmd_buffer, uint32_t start_
bool sh_gx = (cmd_id & 0x2u) == 0; bool sh_gx = (cmd_id & 0x2u) == 0;
len = ((cmd_id >> 16u) & 0x3fffu) + 1; len = ((cmd_id >> 16u) & 0x3fffu) + 1;
uint8_t op = ((cmd_id >> 8u) & 0xffu); uint8_t op = ((cmd_id >> 8u) & 0xffu);
auto r = ((cmd_id >> 2u) & 0x3fu); auto r = KYTY_PM4_R(cmd_id);
file->Printf("%s %s(OP:0x%02" PRIx8 ") SH:%s CNT:%u\n", g_names[op], (op == IT_NOP ? g_r_names[r] : ""), op, file->Printf("%s %s(OP:0x%02" PRIx8 ") SH:%s CNT:%u\n", g_names[op], (op == IT_NOP ? g_r_names[r] : ""), op,
sh_gx ? "GX" : "CX", len); sh_gx ? "GX" : "CX", len);
@@ -140,6 +145,18 @@ void DumpPm4PacketStream(Core::File* file, uint32_t* cmd_buffer, uint32_t start_
{ {
file->Printf(" | 0x%08" PRIx32 " | \n", cmd[i]); file->Printf(" | 0x%08" PRIx32 " | \n", cmd[i]);
} }
if (op == IT_NOP && (r == R_CX_REGS_INDIRECT || r == R_SH_REGS_INDIRECT || r == R_UC_REGS_INDIRECT) && len == 3)
{
auto* indirect_buffer = reinterpret_cast<uint32_t*>(cmd[1] | (static_cast<uint64_t>(cmd[2]) << 32u));
uint32_t indirect_num_dw = cmd[0];
for (uint32_t i = 0; i < indirect_num_dw; i++, indirect_buffer += 2)
{
file->Printf(" | | offset = 0x%08" PRIx32 ", value = 0x%08" PRIx32 "\n", indirect_buffer[0],
indirect_buffer[1]);
}
}
} else } else
{ {
file->Printf("?????\n"); file->Printf("?????\n");
source/emulator/src/Graphics/Shader.cpp
+90 -52
View File
@@ -2088,7 +2088,7 @@ KYTY_SHADER_PARSER(shader_parse)
return ptr - src; return ptr - src;
} }
static void vs_print(const char* func, const HW::VsStageRegisters& vs) static void vs_print(const char* func, const HW::VsStageRegisters& vs, const HW::ShaderRegisters& sh)
{ {
printf("%s\n", func); printf("%s\n", func);
@@ -2098,12 +2098,23 @@ static void vs_print(const char* func, const HW::VsStageRegisters& vs)
printf("\t GetInputComponentsCount() = 0x%08" PRIx32 "\n", vs.GetInputComponentsCount()); printf("\t GetInputComponentsCount() = 0x%08" PRIx32 "\n", vs.GetInputComponentsCount());
printf("\t GetUnknown1() = 0x%08" PRIx32 "\n", vs.GetUnknown1()); printf("\t GetUnknown1() = 0x%08" PRIx32 "\n", vs.GetUnknown1());
printf("\t GetUnknown2() = 0x%08" PRIx32 "\n", vs.GetUnknown2()); printf("\t GetUnknown2() = 0x%08" PRIx32 "\n", vs.GetUnknown2());
printf("\t m_spiVsOutConfig = 0x%08" PRIx32 "\n", vs.m_spiVsOutConfig); printf("\t m_spiVsOutConfig = 0x%08" PRIx32 "\n", sh.m_spiVsOutConfig);
printf("\t m_spiShaderPosFormat = 0x%08" PRIx32 "\n", vs.m_spiShaderPosFormat); printf("\t m_spiShaderPosFormat = 0x%08" PRIx32 "\n", sh.m_spiShaderPosFormat);
printf("\t m_paClVsOutCntl = 0x%08" PRIx32 "\n", vs.m_paClVsOutCntl); printf("\t m_paClVsOutCntl = 0x%08" PRIx32 "\n", sh.m_paClVsOutCntl);
printf("\t m_spiShaderIdxFormat = 0x%08" PRIx32 "\n", sh.m_spiShaderIdxFormat);
printf("\t m_geNggSubgrpCntl = 0x%08" PRIx32 "\n", sh.m_geNggSubgrpCntl);
printf("\t m_vgtGsInstanceCnt = 0x%08" PRIx32 "\n", sh.m_vgtGsInstanceCnt);
printf("\t GetEsVertsPerSubgrp() = 0x%08" PRIx32 "\n", sh.GetEsVertsPerSubgrp());
printf("\t GetGsPrimsPerSubgrp() = 0x%08" PRIx32 "\n", sh.GetGsPrimsPerSubgrp());
printf("\t GetGsInstPrimsInSubgrp() = 0x%08" PRIx32 "\n", sh.GetGsInstPrimsInSubgrp());
printf("\t m_geMaxOutputPerSubgroup = 0x%08" PRIx32 "\n", sh.m_geMaxOutputPerSubgroup);
printf("\t m_vgtEsgsRingItemsize = 0x%08" PRIx32 "\n", sh.m_vgtEsgsRingItemsize);
printf("\t m_vgtGsMaxVertOut = 0x%08" PRIx32 "\n", sh.m_vgtGsMaxVertOut);
printf("\t m_vgtGsOutPrimType = 0x%08" PRIx32 "\n", sh.m_vgtGsOutPrimType);
} }
static void ps_print(const char* func, const HW::PsStageRegisters& ps) static void ps_print(const char* func, const HW::PsStageRegisters& ps, const HW::ShaderRegisters& sh)
{ {
printf("%s\n", func); printf("%s\n", func);
@@ -2112,26 +2123,28 @@ static void ps_print(const char* func, const HW::PsStageRegisters& ps)
// printf("\t m_spiShaderPgmRsrc2Ps = 0x%08" PRIx32 "\n", ps.m_spiShaderPgmRsrc2Ps); // printf("\t m_spiShaderPgmRsrc2Ps = 0x%08" PRIx32 "\n", ps.m_spiShaderPgmRsrc2Ps);
// printf("\t GetTargetOutputMode(0) = 0x%08" PRIx32 "\n", ps.GetTargetOutputMode(0)); // printf("\t GetTargetOutputMode(0) = 0x%08" PRIx32 "\n", ps.GetTargetOutputMode(0));
printf("\t data_addr = 0x%016" PRIx64 "\n", ps.data_addr); printf("\t data_addr = 0x%016" PRIx64 "\n", ps.data_addr);
printf("\t conservative_z_export_value = 0x%08" PRIx32 "\n", ps.conservative_z_export_value); printf("\t conservative_z_export_value = 0x%08" PRIx32 "\n", sh.db_shader_control.conservative_z_export_value);
printf("\t shader_z_behavior = 0x%08" PRIx32 "\n", ps.shader_z_behavior); printf("\t shader_z_behavior = 0x%08" PRIx32 "\n", sh.db_shader_control.shader_z_behavior);
printf("\t shader_kill_enable = %s\n", ps.shader_kill_enable ? "true" : "false"); printf("\t shader_kill_enable = %s\n", sh.db_shader_control.shader_kill_enable ? "true" : "false");
printf("\t shader_z_export_enable = %s\n", ps.shader_z_export_enable ? "true" : "false"); printf("\t shader_z_export_enable = %s\n", sh.db_shader_control.shader_z_export_enable ? "true" : "false");
printf("\t shader_execute_on_noop = %s\n", ps.shader_execute_on_noop ? "true" : "false"); printf("\t shader_execute_on_noop = %s\n", sh.db_shader_control.shader_execute_on_noop ? "true" : "false");
printf("\t vgprs = 0x%02" PRIx8 "\n", ps.vgprs); printf("\t vgprs = 0x%02" PRIx8 "\n", ps.vgprs);
printf("\t sgprs = 0x%02" PRIx8 "\n", ps.sgprs); printf("\t sgprs = 0x%02" PRIx8 "\n", ps.sgprs);
printf("\t scratch_en = 0x%02" PRIx8 "\n", ps.scratch_en); printf("\t scratch_en = 0x%02" PRIx8 "\n", ps.scratch_en);
printf("\t user_sgpr = 0x%02" PRIx8 "\n", ps.user_sgpr); printf("\t user_sgpr = 0x%02" PRIx8 "\n", ps.user_sgpr);
printf("\t wave_cnt_en = 0x%02" PRIx8 "\n", ps.wave_cnt_en); printf("\t wave_cnt_en = 0x%02" PRIx8 "\n", ps.wave_cnt_en);
printf("\t shader_z_format = 0x%08" PRIx32 "\n", ps.shader_z_format); printf("\t shader_z_format = 0x%08" PRIx32 "\n", sh.shader_z_format);
printf("\t target_output_mode[0] = 0x%02" PRIx8 "\n", ps.target_output_mode[0]); printf("\t target_output_mode[0] = 0x%02" PRIx8 "\n", sh.target_output_mode[0]);
printf("\t ps_input_ena = 0x%08" PRIx32 "\n", ps.ps_input_ena); printf("\t ps_input_ena = 0x%08" PRIx32 "\n", sh.ps_input_ena);
printf("\t ps_input_addr = 0x%08" PRIx32 "\n", ps.ps_input_addr); printf("\t ps_input_addr = 0x%08" PRIx32 "\n", sh.ps_input_addr);
printf("\t ps_in_control = 0x%08" PRIx32 "\n", ps.ps_in_control); printf("\t ps_in_control = 0x%08" PRIx32 "\n", sh.ps_in_control);
printf("\t baryc_cntl = 0x%08" PRIx32 "\n", ps.baryc_cntl); printf("\t baryc_cntl = 0x%08" PRIx32 "\n", sh.baryc_cntl);
printf("\t m_cbShaderMask = 0x%08" PRIx32 "\n", ps.m_cbShaderMask); printf("\t m_cbShaderMask = 0x%08" PRIx32 "\n", sh.m_cbShaderMask);
printf("\t m_paScShaderControl = 0x%08" PRIx32 "\n", sh.m_paScShaderControl);
} }
static void cs_print(const char* func, const HW::CsStageRegisters& cs) static void cs_print(const char* func, const HW::CsStageRegisters& cs, const HW::ShaderRegisters& /*sh*/)
{ {
printf("%s\n", func); printf("%s\n", func);
@@ -2183,7 +2196,7 @@ static void bi_print(const char* func, const ShaderBinaryInfo& bi)
printf("\t crc32 = 0x%08" PRIx32 "\n", bi.crc32); printf("\t crc32 = 0x%08" PRIx32 "\n", bi.crc32);
} }
static void vs_check(const HW::VsStageRegisters& vs) static void vs_check(const HW::VsStageRegisters& vs, const HW::ShaderRegisters& sh)
{ {
EXIT_NOT_IMPLEMENTED(vs.GetStreamoutEnabled() != false); EXIT_NOT_IMPLEMENTED(vs.GetStreamoutEnabled() != false);
// EXIT_NOT_IMPLEMENTED(vs.GetSgprCount() != 0x00000000); // EXIT_NOT_IMPLEMENTED(vs.GetSgprCount() != 0x00000000);
@@ -2191,17 +2204,28 @@ static void vs_check(const HW::VsStageRegisters& vs)
// EXIT_NOT_IMPLEMENTED(vs.GetUnknown1() != 0x002c0000); // EXIT_NOT_IMPLEMENTED(vs.GetUnknown1() != 0x002c0000);
// EXIT_NOT_IMPLEMENTED(vs.GetUnknown2() != 0x00000000); // EXIT_NOT_IMPLEMENTED(vs.GetUnknown2() != 0x00000000);
// EXIT_NOT_IMPLEMENTED(vs.m_spiVsOutConfig != 0x00000000); // EXIT_NOT_IMPLEMENTED(vs.m_spiVsOutConfig != 0x00000000);
EXIT_NOT_IMPLEMENTED(vs.m_spiShaderPosFormat != 0x00000004); EXIT_NOT_IMPLEMENTED(sh.m_spiShaderPosFormat != 0x00000004);
EXIT_NOT_IMPLEMENTED(vs.m_paClVsOutCntl != 0x00000000); EXIT_NOT_IMPLEMENTED(sh.m_paClVsOutCntl != 0x00000000);
EXIT_NOT_IMPLEMENTED(sh.m_spiShaderIdxFormat != 0x00000000 && sh.m_spiShaderIdxFormat != 0x00000001);
EXIT_NOT_IMPLEMENTED(sh.m_geNggSubgrpCntl != 0x00000000 && sh.m_geNggSubgrpCntl != 0x00000001);
EXIT_NOT_IMPLEMENTED(sh.m_vgtGsInstanceCnt != 0x00000000);
EXIT_NOT_IMPLEMENTED(sh.GetEsVertsPerSubgrp() != 0x00000000);
EXIT_NOT_IMPLEMENTED(sh.GetGsPrimsPerSubgrp() != 0x00000000);
EXIT_NOT_IMPLEMENTED(sh.GetGsInstPrimsInSubgrp() != 0x00000000);
EXIT_NOT_IMPLEMENTED(sh.m_geMaxOutputPerSubgroup != 0x00000000);
EXIT_NOT_IMPLEMENTED(sh.m_vgtEsgsRingItemsize != 0x00000000);
EXIT_NOT_IMPLEMENTED(sh.m_vgtGsMaxVertOut != 0x00000000);
EXIT_NOT_IMPLEMENTED(sh.m_vgtGsOutPrimType != 0x00000000);
} }
static void ps_check(const HW::PsStageRegisters& ps) static void ps_check(const HW::PsStageRegisters& ps, const HW::ShaderRegisters& sh)
{ {
EXIT_NOT_IMPLEMENTED(ps.target_output_mode[0] != 4 && ps.target_output_mode[0] != 9); EXIT_NOT_IMPLEMENTED(sh.target_output_mode[0] != 4 && sh.target_output_mode[0] != 9);
EXIT_NOT_IMPLEMENTED(ps.conservative_z_export_value != 0x00000000); EXIT_NOT_IMPLEMENTED(sh.db_shader_control.conservative_z_export_value != 0x00000000);
EXIT_NOT_IMPLEMENTED(ps.shader_z_behavior != 0x00000001 && ps.shader_z_behavior != 0x00000000); EXIT_NOT_IMPLEMENTED(sh.db_shader_control.shader_z_behavior != 0x00000001 && sh.db_shader_control.shader_z_behavior != 0x00000000);
// EXIT_NOT_IMPLEMENTED(ps.shader_kill_enable != false); // EXIT_NOT_IMPLEMENTED(ps.shader_kill_enable != false);
EXIT_NOT_IMPLEMENTED(ps.shader_z_export_enable != false); EXIT_NOT_IMPLEMENTED(sh.db_shader_control.shader_z_export_enable != false);
// EXIT_NOT_IMPLEMENTED(ps.shader_execute_on_noop != false); // EXIT_NOT_IMPLEMENTED(ps.shader_execute_on_noop != false);
// EXIT_NOT_IMPLEMENTED(ps.m_spiShaderPgmRsrc1Ps != 0x002c0000); // EXIT_NOT_IMPLEMENTED(ps.m_spiShaderPgmRsrc1Ps != 0x002c0000);
// EXIT_NOT_IMPLEMENTED(ps.m_spiShaderPgmRsrc2Ps != 0x00000000); // EXIT_NOT_IMPLEMENTED(ps.m_spiShaderPgmRsrc2Ps != 0x00000000);
@@ -2210,15 +2234,18 @@ static void ps_check(const HW::PsStageRegisters& ps)
EXIT_NOT_IMPLEMENTED(ps.scratch_en != 0); EXIT_NOT_IMPLEMENTED(ps.scratch_en != 0);
// EXIT_NOT_IMPLEMENTED(ps.user_sgpr != 0 && ps.user_sgpr != 4 && ps.user_sgpr != 12); // EXIT_NOT_IMPLEMENTED(ps.user_sgpr != 0 && ps.user_sgpr != 4 && ps.user_sgpr != 12);
EXIT_NOT_IMPLEMENTED(ps.wave_cnt_en != 0); EXIT_NOT_IMPLEMENTED(ps.wave_cnt_en != 0);
EXIT_NOT_IMPLEMENTED(ps.shader_z_format != 0x00000000); EXIT_NOT_IMPLEMENTED(sh.shader_z_format != 0x00000000);
EXIT_NOT_IMPLEMENTED(ps.ps_input_ena != 0x00000002 && ps.ps_input_ena != 0x00000302); EXIT_NOT_IMPLEMENTED(sh.ps_input_ena != 0x00000002 && sh.ps_input_ena != 0x00000302);
EXIT_NOT_IMPLEMENTED(ps.ps_input_addr != 0x00000002 && ps.ps_input_addr != 0x00000302); EXIT_NOT_IMPLEMENTED(sh.ps_input_addr != 0x00000002 && sh.ps_input_addr != 0x00000302);
// EXIT_NOT_IMPLEMENTED(ps.m_spiPsInControl != 0x00000000); // EXIT_NOT_IMPLEMENTED(ps.m_spiPsInControl != 0x00000000);
EXIT_NOT_IMPLEMENTED(ps.baryc_cntl != 0x00000000); EXIT_NOT_IMPLEMENTED(sh.baryc_cntl != 0x00000000);
EXIT_NOT_IMPLEMENTED(ps.m_cbShaderMask != 0x0000000f); EXIT_NOT_IMPLEMENTED(sh.m_cbShaderMask != 0x0000000f);
EXIT_NOT_IMPLEMENTED(sh.db_shader_control.other_bits != 0x00000000);
EXIT_NOT_IMPLEMENTED(sh.m_paScShaderControl != 0x00000000);
} }
static void cs_check(const HW::CsStageRegisters& cs) static void cs_check(const HW::CsStageRegisters& cs, const HW::ShaderRegisters& /*sh*/)
{ {
// EXIT_NOT_IMPLEMENTED(cs.num_thread_x != 0x00000040); // EXIT_NOT_IMPLEMENTED(cs.num_thread_x != 0x00000040);
// EXIT_NOT_IMPLEMENTED(cs.num_thread_y != 0x00000001); // EXIT_NOT_IMPLEMENTED(cs.num_thread_y != 0x00000001);
@@ -2713,13 +2740,13 @@ void ShaderCalcBindingIndices(ShaderBindResources* bind)
EXIT_IF((bind->push_constant_size % 16) != 0); EXIT_IF((bind->push_constant_size % 16) != 0);
} }
void ShaderGetInputInfoVS(const HW::VertexShaderInfo* regs, ShaderVertexInputInfo* info) void ShaderGetInputInfoVS(const HW::VertexShaderInfo* regs, const HW::ShaderRegisters* sh, ShaderVertexInputInfo* info)
{ {
KYTY_PROFILER_FUNCTION(); KYTY_PROFILER_FUNCTION();
EXIT_IF(info == nullptr || regs == nullptr); EXIT_IF(info == nullptr || regs == nullptr);
info->export_count = static_cast<int>(1 + ((regs->vs_regs.m_spiVsOutConfig >> 1u) & 0x1Fu)); info->export_count = static_cast<int>(sh->GetExportCount());
info->bind.push_constant_offset = 0; info->bind.push_constant_offset = 0;
info->bind.push_constant_size = 0; info->bind.push_constant_size = 0;
info->bind.descriptor_set_slot = 0; info->bind.descriptor_set_slot = 0;
@@ -2800,28 +2827,30 @@ void ShaderGetInputInfoVS(const HW::VertexShaderInfo* regs, ShaderVertexInputInf
} }
// NOLINTNEXTLINE(readability-function-cognitive-complexity) // NOLINTNEXTLINE(readability-function-cognitive-complexity)
void ShaderGetInputInfoPS(const HW::PixelShaderInfo* regs, const ShaderVertexInputInfo* vs_info, ShaderPixelInputInfo* ps_info) void ShaderGetInputInfoPS(const HW::PixelShaderInfo* regs, const HW::ShaderRegisters* sh, const ShaderVertexInputInfo* vs_info,
ShaderPixelInputInfo* ps_info)
{ {
KYTY_PROFILER_FUNCTION(); KYTY_PROFILER_FUNCTION();
EXIT_IF(vs_info == nullptr); EXIT_IF(vs_info == nullptr);
EXIT_IF(ps_info == nullptr); EXIT_IF(ps_info == nullptr);
EXIT_IF(regs == nullptr); EXIT_IF(regs == nullptr);
EXIT_IF(sh == nullptr);
if (regs->ps_embedded) if (regs->ps_embedded)
{ {
return; return;
} }
ps_info->input_num = regs->ps_regs.ps_in_control; ps_info->input_num = sh->ps_in_control;
ps_info->ps_pos_xy = (regs->ps_regs.ps_input_ena == 0x00000302 && regs->ps_regs.ps_input_addr == 0x00000302); ps_info->ps_pos_xy = (sh->ps_input_ena == 0x00000302 && sh->ps_input_addr == 0x00000302);
ps_info->ps_pixel_kill_enable = regs->ps_regs.shader_kill_enable; ps_info->ps_pixel_kill_enable = sh->db_shader_control.shader_kill_enable;
ps_info->ps_early_z = (regs->ps_regs.shader_z_behavior == 1); ps_info->ps_early_z = (sh->db_shader_control.shader_z_behavior == 1);
ps_info->ps_execute_on_noop = regs->ps_regs.shader_execute_on_noop; ps_info->ps_execute_on_noop = sh->db_shader_control.shader_execute_on_noop;
for (uint32_t i = 0; i < ps_info->input_num; i++) for (uint32_t i = 0; i < ps_info->input_num; i++)
{ {
ps_info->interpolator_settings[i] = regs->ps_interpolator_settings[i]; ps_info->interpolator_settings[i] = sh->ps_interpolator_settings[i];
} }
ps_info->bind.descriptor_set_slot = (vs_info->bind.storage_buffers.buffers_num > 0 ? 1 : 0); ps_info->bind.descriptor_set_slot = (vs_info->bind.storage_buffers.buffers_num > 0 ? 1 : 0);
@@ -2830,7 +2859,7 @@ void ShaderGetInputInfoPS(const HW::PixelShaderInfo* regs, const ShaderVertexInp
for (int i = 0; i < 8; i++) for (int i = 0; i < 8; i++)
{ {
ps_info->target_output_mode[i] = regs->ps_regs.target_output_mode[i]; ps_info->target_output_mode[i] = sh->target_output_mode[i];
} }
const auto* src = reinterpret_cast<const uint32_t*>(regs->ps_regs.data_addr); const auto* src = reinterpret_cast<const uint32_t*>(regs->ps_regs.data_addr);
@@ -2894,7 +2923,7 @@ void ShaderGetInputInfoPS(const HW::PixelShaderInfo* regs, const ShaderVertexInp
} }
// NOLINTNEXTLINE(readability-function-cognitive-complexity) // NOLINTNEXTLINE(readability-function-cognitive-complexity)
void ShaderGetInputInfoCS(const HW::ComputeShaderInfo* regs, ShaderComputeInputInfo* info) void ShaderGetInputInfoCS(const HW::ComputeShaderInfo* regs, const HW::ShaderRegisters* /*sh*/, ShaderComputeInputInfo* info)
{ {
EXIT_IF(info == nullptr); EXIT_IF(info == nullptr);
EXIT_IF(regs == nullptr); EXIT_IF(regs == nullptr);
@@ -3355,10 +3384,13 @@ private:
String m_file_name; String m_file_name;
}; };
ShaderCode ShaderParseVS(const HW::VertexShaderInfo* regs) ShaderCode ShaderParseVS(const HW::VertexShaderInfo* regs, const HW::ShaderRegisters* sh)
{ {
KYTY_PROFILER_FUNCTION(profiler::colors::Amber300); KYTY_PROFILER_FUNCTION(profiler::colors::Amber300);
EXIT_IF(regs == nullptr);
EXIT_IF(sh == nullptr);
ShaderCode code; ShaderCode code;
code.SetType(ShaderType::Vertex); code.SetType(ShaderType::Vertex);
@@ -3372,8 +3404,8 @@ ShaderCode ShaderParseVS(const HW::VertexShaderInfo* regs)
EXIT_NOT_IMPLEMENTED(src == nullptr); EXIT_NOT_IMPLEMENTED(src == nullptr);
vs_print("ShaderParseVS()", regs->vs_regs); vs_print("ShaderParseVS()", regs->vs_regs, *sh);
vs_check(regs->vs_regs); vs_check(regs->vs_regs, *sh);
const auto* header = GetBinaryInfo(src); const auto* header = GetBinaryInfo(src);
@@ -3434,10 +3466,13 @@ Vector<uint32_t> ShaderRecompileVS(const ShaderCode& code, const ShaderVertexInp
return ret; return ret;
} }
ShaderCode ShaderParsePS(const HW::PixelShaderInfo* regs) ShaderCode ShaderParsePS(const HW::PixelShaderInfo* regs, const HW::ShaderRegisters* sh)
{ {
KYTY_PROFILER_FUNCTION(profiler::colors::Blue300); KYTY_PROFILER_FUNCTION(profiler::colors::Blue300);
EXIT_IF(regs == nullptr);
EXIT_IF(sh == nullptr);
ShaderCode code; ShaderCode code;
code.SetType(ShaderType::Pixel); code.SetType(ShaderType::Pixel);
@@ -3451,8 +3486,8 @@ ShaderCode ShaderParsePS(const HW::PixelShaderInfo* regs)
EXIT_NOT_IMPLEMENTED(src == nullptr); EXIT_NOT_IMPLEMENTED(src == nullptr);
ps_print("ShaderParsePS()", regs->ps_regs); ps_print("ShaderParsePS()", regs->ps_regs, *sh);
ps_check(regs->ps_regs); ps_check(regs->ps_regs, *sh);
EXIT_NOT_IMPLEMENTED(regs->ps_regs.user_sgpr > regs->ps_user_sgpr.count); EXIT_NOT_IMPLEMENTED(regs->ps_regs.user_sgpr > regs->ps_user_sgpr.count);
@@ -3520,16 +3555,19 @@ Vector<uint32_t> ShaderRecompilePS(const ShaderCode& code, const ShaderPixelInpu
return ret; return ret;
} }
ShaderCode ShaderParseCS(const HW::ComputeShaderInfo* regs) ShaderCode ShaderParseCS(const HW::ComputeShaderInfo* regs, const HW::ShaderRegisters* sh)
{ {
KYTY_PROFILER_FUNCTION(profiler::colors::CyanA700); KYTY_PROFILER_FUNCTION(profiler::colors::CyanA700);
EXIT_IF(regs == nullptr);
EXIT_IF(sh == nullptr);
const auto* src = reinterpret_cast<const uint32_t*>(regs->cs_regs.data_addr); const auto* src = reinterpret_cast<const uint32_t*>(regs->cs_regs.data_addr);
EXIT_NOT_IMPLEMENTED(src == nullptr); EXIT_NOT_IMPLEMENTED(src == nullptr);
cs_print("ShaderParseCS()", regs->cs_regs); cs_print("ShaderParseCS()", regs->cs_regs, *sh);
cs_check(regs->cs_regs); cs_check(regs->cs_regs, *sh);
EXIT_NOT_IMPLEMENTED(regs->cs_regs.user_sgpr > regs->cs_user_sgpr.count); EXIT_NOT_IMPLEMENTED(regs->cs_regs.user_sgpr > regs->cs_user_sgpr.count);
source/emulator/src/Libs/LibGraphicsDriver.cpp
+32 -8
View File
@@ -70,13 +70,6 @@ LIB_DEFINE(InitGraphicsDriver_1)
LIB_FUNC("2JtWUUiYBXs", Gen5::GraphicsGetRegisterDefaults2); LIB_FUNC("2JtWUUiYBXs", Gen5::GraphicsGetRegisterDefaults2);
LIB_FUNC("wRbq6ZjNop4", Gen5::GraphicsGetRegisterDefaults2Internal); LIB_FUNC("wRbq6ZjNop4", Gen5::GraphicsGetRegisterDefaults2Internal);
LIB_FUNC("f3dg2CSgRKY", Gen5::GraphicsCreateShader); LIB_FUNC("f3dg2CSgRKY", Gen5::GraphicsCreateShader);
LIB_FUNC("TRO721eVt4g", Gen5::GraphicsDcbResetQueue);
LIB_FUNC("MWiElSNE8j8", Gen5::GraphicsDcbWaitUntilSafeForRendering);
LIB_FUNC("ZvwO9euwYzc", Gen5::GraphicsDcbSetCxRegistersIndirect);
LIB_FUNC("-HOOCn0JY48", Gen5::GraphicsDcbSetShRegistersIndirect);
LIB_FUNC("hvUfkUIQcOE", Gen5::GraphicsDcbSetUcRegistersIndirect);
LIB_FUNC("GIIW2J37e70", Gen5::GraphicsDcbSetIndexSize);
LIB_FUNC("Yw0jKSqop+E", Gen5::GraphicsDcbDrawIndexAuto);
LIB_FUNC("vcmNN+AAXnY", Gen5::GraphicsSetCxRegIndirectPatchSetAddress); LIB_FUNC("vcmNN+AAXnY", Gen5::GraphicsSetCxRegIndirectPatchSetAddress);
LIB_FUNC("Qrj4c+61z4A", Gen5::GraphicsSetShRegIndirectPatchSetAddress); LIB_FUNC("Qrj4c+61z4A", Gen5::GraphicsSetShRegIndirectPatchSetAddress);
LIB_FUNC("6lNcCp+fxi4", Gen5::GraphicsSetUcRegIndirectPatchSetAddress); LIB_FUNC("6lNcCp+fxi4", Gen5::GraphicsSetUcRegIndirectPatchSetAddress);
@@ -85,16 +78,47 @@ LIB_DEFINE(InitGraphicsDriver_1)
LIB_FUNC("vRoArM9zaIk", Gen5::GraphicsSetUcRegIndirectPatchAddRegisters); LIB_FUNC("vRoArM9zaIk", Gen5::GraphicsSetUcRegIndirectPatchAddRegisters);
LIB_FUNC("D9sr1xGUriE", Gen5::GraphicsCreatePrimState); LIB_FUNC("D9sr1xGUriE", Gen5::GraphicsCreatePrimState);
LIB_FUNC("HV4j+E0MBHE", Gen5::GraphicsCreateInterpolantMapping); LIB_FUNC("HV4j+E0MBHE", Gen5::GraphicsCreateInterpolantMapping);
LIB_FUNC("n2fD4A+pb+g", Gen5::GraphicsCbSetShRegisterRangeDirect);
LIB_FUNC("V++UgBtQhn0", Gen5::GraphicsGetDataPacketPayloadAddress); LIB_FUNC("V++UgBtQhn0", Gen5::GraphicsGetDataPacketPayloadAddress);
LIB_FUNC("h9z6+0hEydk", Gen5::GraphicsSuspendPoint);
LIB_FUNC("n2fD4A+pb+g", Gen5::GraphicsCbSetShRegisterRangeDirect);
LIB_FUNC("wr23dPKyWc0", Gen5::GraphicsCbReleaseMem);
LIB_FUNC("TRO721eVt4g", Gen5::GraphicsDcbResetQueue);
LIB_FUNC("MWiElSNE8j8", Gen5::GraphicsDcbWaitUntilSafeForRendering);
LIB_FUNC("ZvwO9euwYzc", Gen5::GraphicsDcbSetCxRegistersIndirect);
LIB_FUNC("-HOOCn0JY48", Gen5::GraphicsDcbSetShRegistersIndirect);
LIB_FUNC("hvUfkUIQcOE", Gen5::GraphicsDcbSetUcRegistersIndirect);
LIB_FUNC("GIIW2J37e70", Gen5::GraphicsDcbSetIndexSize);
LIB_FUNC("Yw0jKSqop+E", Gen5::GraphicsDcbDrawIndexAuto);
LIB_FUNC("aJf+j5yntiU", Gen5::GraphicsDcbEventWrite);
LIB_FUNC("57labkp+rSQ", Gen5::GraphicsDcbAcquireMem);
LIB_FUNC("i1jyy49AjXU", Gen5::GraphicsDcbWriteData);
LIB_FUNC("VmW0Tdpy420", Gen5::GraphicsDcbWaitRegMem);
LIB_FUNC("YUeqkyT7mEQ", Gen5::GraphicsDcbSetFlip);
} }
} // namespace LibGen5 } // namespace LibGen5
namespace LibGen5Driver {
LIB_VERSION("Graphics5Driver", 1, "Graphics5Driver", 1, 1);
namespace Gen5Driver = Graphics::Gen5Driver;
LIB_DEFINE(InitGraphicsDriver_1)
{
PRINT_NAME_ENABLE(true);
LIB_FUNC("UglJIZjGssM", Gen5Driver::GraphicsDriverSubmitDcb);
}
} // namespace LibGen5Driver
LIB_DEFINE(InitGraphicsDriver_1) LIB_DEFINE(InitGraphicsDriver_1)
{ {
LibGen4::InitGraphicsDriver_1(s); LibGen4::InitGraphicsDriver_1(s);
LibGen5::InitGraphicsDriver_1(s); LibGen5::InitGraphicsDriver_1(s);
LibGen5Driver::InitGraphicsDriver_1(s);
} }
} // namespace Kyty::Libs } // namespace Kyty::Libs